Subject: Re: k0/k1 register while mulhi/mullo manipulation
To: Todd Whitesel <email@example.com>
From: Jason Thorpe <firstname.lastname@example.org>
Date: 02/23/2000 11:20:38
On Wed, 23 Feb 2000 04:07:33 -0800 (PST)
Todd Whitesel <email@example.com> wrote:
> If you have any kind of interrupts enabled, then k0/k1 are off limits.
> One of them might be overwritten by an interrupt return address at any
> time, and the other might be zero'd or whatever the interrupt handler
> does to cover its tracks.
Right, well, in our case, k0 and k1 are used in the TLB miss handlers.
-- Jason R. Thorpe <firstname.lastname@example.org>