Subject: MIPS pmap.c change is going...
To: None <email@example.com, firstname.lastname@example.org>
From: Toru Nishimura <email@example.com>
Date: 05/19/1999 18:54:40
I'm now modifying several things of NetBSD/mips VM. I've just changed
a tiny code segment of TLB flush operation. The new code does
preserve all of kernel TLB entries, which map things KSEG2 space,
whenever TLBPID (ASID) generation number wraps (happens every ~60
context switchs). This reduces kernel TLB miss exception
Other changes are now under way. I realized there is a plenty of room
for improvement. I will do CVS commit work incrementally. If I've
break something mistakenly, please scream to me.
Nara Institute of Science and Technology