> Does the machine have an L2 cache?

No.

> If not, did you define MIPS3_FLUSH? Does the problem go away if you
> do?  The ``normal'' codepath relies on an L2 cache to warn about
> aliases in the virtually-indexed L1 cache; if you dont have an L2
> cache you can get nasty aliasing problems.

Bingo! MIPS3_FLUSH fixes the problem.
Thanks!

> Some ARC machines do, some dont.

I'll change the MIPS3_FLUSH test from #ifdef to the dynamic test
based on L2 cache present or not.
Is this OK?

BTW, I encountered next problem. :-)
Probably this is spl related. ARC's spl handling should be fixed anyway,
so I'm trying to fix it, now.
--
soda