In message <199807250151.KAA20332@srapc342.sra.co.jp> Noriyuki Soda writes:
: I'll change the MIPS3_FLUSH test from #ifdef to the dynamic test
: based on L2 cache present or not.
: Is this OK?

I think it is ok and good to do.  IIRC, some arc machines have L2
caches, while many don't.  The magnums do have L2 cache, in some
incarnations, and I think it would be a good thing if the number of
different machines that could boot a kernel were as large as possible.

My Deskstation rPC44 doesn't have sniffing L2 cache (but does have
slow, 486ish cache that interfaces to the memory on board the
motherboard, a design that gives the nice fast MIPS chip fits because
the memory bandwidth, even to on motherboard cache, is horrible.

All This is assuming that the added test doesn't slow things down too
much.

There is always the Linux approach which seems to have and tuned
version of many of the system functions based on cache size and
type...

Warner