On Feb 28,  7:29pm, Jonathan Stone wrote:
> Michael Smith writes:
> >Is the MI mips code ready for showtime? 
> 
> I beleive that bcopy() still needs to be re-written to be bi-endian:
> e.g., by using macros to do "load higher address" (word,byte), rather
> than explicit lwl/lwr.	
> 
> Otherwise, I think the MI mips code is basically ready for showtime.
> Michael Hitch has got an r4k-based DECstation to single-user prompt.
> These machines have nontrivial secondary caches, and so need some more
> support than was in Per's original Pica code.

  The MI mips code still needs some work for the R4000.  I've run into a
few places that didn't work on the R4000.  I've got some temporary changes
that make it work on the R4000 DECstation, but it needs to be done better
once I get the rest of my stuff working better.

> I don't know how far Michael Hitch has got with the r4k version of
> pmap.c; when that works reliably with 2nd-level caches, there's likely

  I've got pmax/pmap.c working on the R4000 with uncached mapping.  Now
that I understand the R4000 primary and secondary cache organization and
operation, I'm starting to make progress toward enabling cached memory
(even though the virtual pages are mapped uncached, the cached KSEG0
address space used by the kernel has been causing me headaches).

Michael

-- 
Michael L. Hitch			INTERNET:  mhitch@montana.edu
Computer Consultant
Information Technology Center
Montana State University	Bozeman, MT	USA