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Re: Old World SMP



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Hello,

On Oct 11, 2010, at 6:29 PM, John Klos wrote:

I'm not sure where things were left, but I decided to try a GENERIC.MP kernel on my dual 200 MHz 604e 7600 machine:

NetBSD 5.1_RC4 (GENERIC.MP) #0: Tue Sep 14 00:01:10 UTC 2010

builds%b6.netbsd.org@localhost:/home/builds/ab/netbsd-5-1-RC4/macppc/ 201009140238Z-obj/home/builds/ab/netbsd-5-1-RC4/src/sys/arch/macppc/ compile/GENERIC.MP
total memory = 256 MB
avail memory = 240 MB
found Grand Central PIC at f3000000
bootpath: /bandit@F2000000/ACARD,6260@D/sd@0/netbsd.mp
mainbus0 (root)
cpu0 at mainbus0: 604e (Revision 2.3), ID 0 (primary)
cpu0: HID0 8000c084<EMCP,ICE,DCE,SGE,BHT>, powersave: 1
cpu0: 200.00 MHz
cpu1 at mainbus00:CPU 1 didn't start 0
Stopped in pid 0.1 (system) at netbsd:cpu_Debugger+0x10: lwz r0, r1, 0
x14
0x008e3ae0: at cpu_spinup+0x2a0
0x008e3ba0: at cpuattach+0x54
0x008e3bd0: at config_attach_loc+0x188
0x008e3c00: at mainbus_attach+0x68
0x008e3cd0: at config_attach_loc+0x188
0x008e3d00: at cpu_configure+0x158
0x008e3ec0: at configure+0x40
0x008e3ee0: at main+0x160
0x008e3f30: at 0x100094

Not too unexpected, but I figured it was worth a try.

It's known broken for years and likely not hard to fix but nobody with the right combination of skill and time has the right hardware. I'd almost bet that the problem is that the code that starts secondary CPUs for some reason doesn't poke the right gpio register to release that CPU's reset pin. Then, I wouldn't bet that the IPI code works, pretty much for the same reason ( Hammerhead SMP support is rather primitive - there's just a bunch of GPIOs to pull each CPU's reset and interrupt pins, IIRC there is no way to route any actual device interrupts to any other CPU than cpu0 ) So, I could probably make it work in a weekend with such a machine in my hands.

have fun
Michael

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