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Hello,

On Sep 2, 2007, at 21:21, khym@azeotrope.org wrote:

> On Sun, Sep 02, 2007 at 02:54:34PM -0400, Michael Lorenz wrote:
>> I just committed something that might help in your case ( update
>> macppc/macppc/autoconf.c and dev/pci/radeonfb.c ) - the reference 
>> clock
>> stated by your firmware is what radeonfb would use as default, namely
>> 27MHz. It does however hardcode the reference divider when it can't 
>> get
>> data from an x86 BIOS so I had it probe the divider - maybe that's 
>> what
>> went wrong.
>>
>> So, please try those changes.
>
> Unfortunately, it doesn't work, and may even be worse than before... as
> before, I still get a black screen with the Apple CRT. However, the
> ViewSonic LCD that mostly worked before now says "No Signal", then goes
> into power saving mode.
>
> The previous kernel said:
> radeonfb0: refclk = 27.000 MHz, refdiv = 12 minpll = 125000, maxpll = 
> 350000
>
> whereas the current one says:
> radeonfb0: refclk = 27.000 MHz, refdiv = 67 minpll = 125000, maxpll = 
> 350000

Ouch, refdiv=67 is totally off. There goes that theory :/

have fun
Michael

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