On Sun, Sep 02, 2007 at 02:54:34PM -0400, Michael Lorenz wrote:
> I just committed something that might help in your case ( update 
> macppc/macppc/autoconf.c and dev/pci/radeonfb.c ) - the reference clock 
> stated by your firmware is what radeonfb would use as default, namely 
> 27MHz. It does however hardcode the reference divider when it can't get 
> data from an x86 BIOS so I had it probe the divider - maybe that's what 
> went wrong.
> 
> So, please try those changes.

Unfortunately, it doesn't work, and may even be worse than before... as
before, I still get a black screen with the Apple CRT. However, the
ViewSonic LCD that mostly worked before now says "No Signal", then goes
into power saving mode.

The previous kernel said:
radeonfb0: refclk = 27.000 MHz, refdiv = 12 minpll = 125000, maxpll = 350000

whereas the current one says:
radeonfb0: refclk = 27.000 MHz, refdiv = 67 minpll = 125000, maxpll = 350000

dmesg follows:

Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 4.99.30 (GREYFOX) #18: Sun Sep  2 15:40:21 CDT 2007
	khym@cheetah.azeotrope.org:/usr/obj.macppc/sys/arch/macppc/compile/GREYFOX
total memory = 832 MB
avail memory = 800 MB
timecounter: Timecounters tick every 10.000 msec
init_interrupt: found OpenPIC @ pa 0x80040000, 0x80040000
mainbus0 (root)
cpu0 at mainbus0: 7400 (Revision 0.9), ID 0 (primary)
cpu0: HID0 8094c0a4<EMCP,DOZE,DPM,EIEC,ICE,DCE,SGE,BTIC,BHT>, powersave: 1
cpu0: 500.00 MHz, no-parity 1MB WB L2 cache (PB SRAM) at 2:1 ratio
cpu1 at mainbus0: ID 1
cpu1: processor off-line; multiprocessor support not present in kernel
uninorth0 at mainbus0
pci0 at uninorth0 bus 0
pci0: i/o space, memory space enabled
pchb0 at pci0 dev 11 function 0
pchb0: Apple Computer UniNorth AGP Interface (rev. 0x00)
radeonfb0 at pci0 dev 16 function 0: ATI Technologies Radeon QD




	<key>EDID</key>
	<data>AP///////wBaYxlDAQEBAQYPAQMOIht4LgSlo1hPlSQZUFS/74CBgHFPYVlFWTFZAQEBAQEBMCoAmFEAKkAwcBMAUg4RAAAeAAAA/wBQMjEwNTA2QzE4MzkKAAAA/QAyVR5SDgAKICAgICAgAAAA/ABWWDcxNQogICAgICAgABQ=</data>
	<key>address</key>
	<integer>0x9c008000</integer>
	<key>cmap_callback</key>
	<integer>0x3ea968</integer>
	<key>depth</key>
	<integer>0x8</integer>
	<key>device_node</key>
	<integer>0xff95bcc0</integer>
	<key>height</key>
	<integer>0x1e0</integer>
	<key>instance_handle</key>
	<integer>0xffbc4f40</integer>
	<key>is_console</key>
	<true/>
	<key>linebytes</key>
	<integer>0x300</integer>
	<key>refclk</key>
	<integer>0xa8c</integer>
	<key>width</key>
	<integer>0x280</integer>


RADEON_BIOS_4_SCRATCH = 00000000
RADEON_FP_GEN_CNTL = 00030048
RADEON_FP2_GEN_CNTL = 00000000
RADEON_TMDS_CNTL = 01000000
RADEON_TMDS_TRANSMITTER_CNTL = 10000080
RADEON_TMDS_PLL_CNTL = 00000a1b
RADEON_LVDS_GEN_CNTL = 00000000
RADEON_FP_HORZ_STRETCH = 00000000
RADEON_FP_VERT_STRETCH = 00000000
radeonfb0: Video BIOS not present
radeonfb0: No video BIOS, using default clocks
no suitable DFP table present
TMDS_PLL dot clock 12000 pll a1b
TMDS_PLL dot clock -1 pll a3f
TMDS_PLL dot clock 0 pll 0
TMDS_PLL dot clock 0 pll 0
radeonfb0: refclk = 27.000 MHz, refdiv = 67 minpll = 125000, maxpll = 350000
No connector info in BIOS!
Port #0:
    conn = 4
    ddc = 2
    dac = 0
    tmds = 0
radeonfb0: using static EDID
max_dotclock according to supported modes: 135000
Vendor: [VSC] ViewSonic
Product: [4319] VX715
Serial number: P210506C1839
Manufactured 2005 Week 6
EDID Version 1.3
EDID Comment: 
Video Input: e
	Analog
	-0.7, 0.3V
	Seperate syncs
	Composite sync
	Sync on green
Gamma: 2.20
Max Size: 34 cm x 27 cm
Features: 2e
	DPMS active-off
	RGB
	Standard color space
	Preferred timing
Chroma Info:
	Red X: 0.636
	Red Y: 0.636
	Grn X: 0.309
	Grn Y: 0.582
	Blu X: 0.142
	Blu Y: 0.099
	Wht X: 0.313
	Wht Y: 0.329
Range:
	Horizontal: 30 - 82 kHz
	Vertical: 50 - 85 Hz
	Max Dot Clock: 140 MHz
Video modes:
	1280x1024 @ 75Hz
	1024x768 @ 75Hz
	1024x768 @ 70Hz
	1024x768 @ 60Hz
	800x600 @ 75Hz
	800x600 @ 72Hz
	800x600 @ 60Hz
	800x600 @ 56Hz
	640x480 @ 75Hz
	640x480 @ 73Hz
	640x480 @ 60Hz
	1280x1024 @ 60Hz
	1152x864 @ 75Hz
	1024x768 @ 85Hz
	800x600 @ 85Hz
	640x480 @ 85Hz
	1280x1024 @ 60Hz
Preferred mode: 1280x1024 @ 60Hz
Port #1:
    conn = 2
    ddc = 3
    dac = 0
    tmds = 1
radeonfb0: using static EDID
max_dotclock according to supported modes: 135000
Vendor: [VSC] ViewSonic
Product: [4319] VX715
Serial number: P210506C1839
Manufactured 2005 Week 6
EDID Version 1.3
EDID Comment: 
Video Input: e
	Analog
	-0.7, 0.3V
	Seperate syncs
	Composite sync
	Sync on green
Gamma: 2.20
Max Size: 34 cm x 27 cm
Features: 2e
	DPMS active-off
	RGB
	Standard color space
	Preferred timing
Chroma Info:
	Red X: 0.636
	Red Y: 0.636
	Grn X: 0.309
	Grn Y: 0.582
	Blu X: 0.142
	Blu Y: 0.099
	Wht X: 0.313
	Wht Y: 0.329
Range:
	Horizontal: 30 - 82 kHz
	Vertical: 50 - 85 Hz
	Max Dot Clock: 140 MHz
Video modes:
	1280x1024 @ 75Hz
	1024x768 @ 75Hz
	1024x768 @ 70Hz
	1024x768 @ 60Hz
	800x600 @ 75Hz
	800x600 @ 72Hz
	800x600 @ 60Hz
	800x600 @ 56Hz
	640x480 @ 75Hz
	640x480 @ 73Hz
	640x480 @ 60Hz
	1280x1024 @ 60Hz
	1152x864 @ 75Hz
	1024x768 @ 85Hz
	800x600 @ 85Hz
	640x480 @ 85Hz
	1280x1024 @ 60Hz
Preferred mode: 1280x1024 @ 60Hz
aperbase = 2550136832
RADEON_MC_FB_LOCATION = 9bff9800
RADEON_MC_AGP_LOCATION = 9bff9c00
RADEON_DAC_CNTL2 = 00000000
RADEON_DAC_CNTL2 = 00000000
RADEON_DISP_HW_DEBUG = 00000000
RADEON_DAC_CNTL = ff000102
RADEON_TV_DAC_CNTL = 00000000
radeonfb0: 64 MB aperture at 0x98000000, 512 KB registers at 0x90080000
radeonfb0: display 0: initial virtual resolution 1280x1024 at 32 bpp
radeonfb0: port 0: physical 1280x1024 60Hz
fpbtr = 0xd4c34000
init engine
init screen called, existing 1
CRTC_GEN_CNTL = 03000600
RADEON_CRTC_EXT_CNTL = 00000048
CRTC_H_TOTAL_DISP = 009f00d2
FP_H_TOTAL_DISP = 009f00d2
CRTC_H_SYNC_STRT_WID = 000e0530
FP_H_SYNC_STRT_WID = 000e0530
CRTC_V_TOTAL_DISP = 03ff0429
FP_V_TOTAL_DISP = 03ff0429
CRTC_V_SYNC_STRT_WID = 00030400
FP_V_SYNC_STRT_WID = 00030400
dot clock: 108000
outfreq: 216000
post divider: 2 (mask 10000)
feedback divider: 536
RADEON_PPLL_REF_DIV = 00000043
RADEON_PPLL_CNTL = 0000a430
RADEON_CRTC_MORE_CNTL = 00000000
RADEON_CRTC_EXT_CNTL = 00000048
RADEON_CRTC_GEN_CNTL = 03000600
RADEON_CLOCK_CNTL_INDEX = 00000000
wsdisplay0 at radeonfb0 kbdmux 1: console (fb, vt100 emulation)
wsmux1: connecting to wsdisplay0
RADEON_FP_GEN_CNTL = 000300cc
RADEON_FP2_GEN_CNTL = 00000000
direct rendering for radeonfb0 unsupported
[...]
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