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Instead of making sure you have the exact same compiler why don't you
make sure you get the same assembly output from one and just copy it
over and assemble it on both..=20
gcc -S main.c -o main.S
scp main.S user@host2:/tmp
as main.S -o main
..etc...

Or better yet, maybe one of us should write some assembly for these
tests, that way we have more control.=20

You can always diff the "strip main; objdump -d main > main.txt" of each
of the executables and compare the assembly.



On Sat, 2005-03-12 at 19:14 -0500, Michael wrote:
> Hello,
>=20
> > Well in my case the g3 b/w has surely a faster memory and system bus..
> Indeed.
>=20
> > but the cache should be 1:2 for both cpu's, shouldn't it? they have
> > exactly the same clock rate...
> No. Most G3s run the cache at approximately half the CPU clock, the 604ev=
 runs it at twice the bus speed, so the 604ev runs its cache at about the s=
peed of the G3's bus.
>=20
> > > And just for fun - when I use the xlc compiler on AIX the 604 is sudd=
enly more than twice as fast as the G3 in FPU-bound tasks and
> > > has an edge almost everywhere else, but that's hardly fair ;-)
> > > So - how do we convince IBM to port xlc to NetBSD? The one I used was=
 quite archaic, 5.0.2 or so.
> > yeah, I know. gcc... if you look at the bottom you see how mipspro edge=
s gcc.
> Yeah. I was rather surprised to find the 195MHz R10k a lot faster than th=
e PowerPCs running FPU-intensive tasks, even with xlc the 604e barely touch=
ed it. In my tests at least.
>=20
> > > > I don't understand why the ppc604ev seems so slow. Everybody though=
t it
> > > > would be faster than the g3! and the fft calculus should be more cp=
u
> > > > bound than memory bound and the dataset should fit in the cache.
> > > The dataset is small, fits into the L2 cache so I'd expect that the G=
3 has an edge because it runs the cache at a much higher speed
> > > than the 604, even the 604ev runs the cache at only 100MHz, the G3 us=
ually runs it at about half the CPU speed.
> >=20
> > ah, I thought the 604ev run the cache 1:2 as the g3.
> No, sadly it doesn't.
>=20
> > > > Could
> > > > the os do something wrong (the 604 is not certified for 10.15 macos=
)
> > > > like not enabling or enabling "badly" the cpu L2 cache?
> > > Hmm, does -mcpu=3D604e -mtune=3D604e change anything? The cache shoul=
d be enabled by the firmware, but who knows, it's OF 1.0.5
> > > after all... how does the benchmark behave under NetBSD? There we'd a=
t least know if the cache is active.
> >=20
> > apple compiler doesn't have any special 604e/ev compiler options here.
> It's gcc, it should understand -mcpu=3D604e
>=20
> have fun
> Michael

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