Subject: Re: 1 Ghz CPU in AGP G4 causes NetBSD 1.6.2 hangs
To: None <port-macppc@NetBSD.org>
From: Tim Kelly <hockey@dialectronics.com>
List: port-macppc
Date: 10/02/2004 13:02:43
At 3:58 PM -0400 9/28/04, Tim Kelly wrote:
>Disclaimer: I could be completely wrong. It's been known to happen.
>Frequently.

Hey, at least I can say I hedged my bet. Yes, I'm wrong. Please disregard
the (mis)information contained in my previous post. The 744x and 745x
families have on-chip L2 caches, and these are CPU specific. There is no
way to retrieve the values dynamically because they are fixed. Either it is
on or it is not. The rest of the settings are generally not configurable.
The L3 cache has some behavior like the 7400 L2 caches, but it is less
configurable. For Don Lee's system, Open Firmware is properly walking the
tree and setting the few values that need to be. Apparently this ability in
Macs that did not originally contain L3'd CPUs to properly initialize them
is contained in a firmware update.

So the L2/L3 cache is not the cause of the problem in 1.6.2. The only
question I have left is the interaction of the L3 cache with write-back and
write-through modes. For 750 and 7400 CPUs, this was a configurable setting
on the L2 cache. I have seen some recommendations for using write-through
when the upgrade greatly exceeds the original capability of the Mac (like
using a G4 on a pre-G3 computer, as one reference from XLR8 says). In the
MPC74500 User's Manual, it says that the L3 cache can handle either mode
but uses the W in the WIMG for a per page or per block basis. As far as I
can tell, NetBSD uses the default of write-back.

Has there been any change in this value between 1.6.2 and 2.0, especially
as it relates to DMA? I looked over the BAT code in machdep.c and
oea_machdep.c and the settings are the same. Would this be set anywhere
else? If there has been a change, was it as a result of a bug report?

I appreciate any information and/or references, and I apologize for any
misinformation and misdirection presented here.

thanks,
tim