In article <20030928191333.GA1284@antioche.eu.org>
bouyer@antioche.eu.org wrote:

> On Sun, Sep 28, 2003 at 02:51:09PM +0900, Izumi Tsutsui wrote:
> > In article <AC38E9ED-F174-11D7-8D9B-000A957020BC@3am-software.com>
> > matt@3am-software.com wrote:
> > 
> > > Hmmm.  I booted a kernel last night with no problem at all.
> > 
> > Just FYI, my Apus2000/200 (603ev) does not boot since (at least) 1.6W.
> > It seems the kernel fails to start init(8).
> 
> This is what I noticed on my 4400/160 too. It probes IDE devices,
> then finds its root device, and hang. I can't enter ddb.
> It seems to hang trying to start init.

I've tracked which changes caused this hang on 603,
and backing out "nuke ci_curpm and curpm" changes on
August 12 makes kernel work again.
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp

Index: arch/powerpc/include/cpu.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/include/cpu.h,v
retrieving revision 1.37
diff -u -r1.37 cpu.h
--- arch/powerpc/include/cpu.h	3 Sep 2003 21:33:31 -0000	1.37
+++ arch/powerpc/include/cpu.h	9 Nov 2003 17:54:44 -0000
@@ -63,6 +63,7 @@
 	struct lwp *ci_curlwp;		/* current owner of the processor */
 
 	struct pcb *ci_curpcb;
+	struct pmap *ci_curpm;
 	struct lwp *ci_fpulwp;
 	struct lwp *ci_veclwp;
 	struct pcb *ci_idle_pcb;	/* PA of our idle pcb */
@@ -161,6 +162,7 @@
 
 #define curlwp			(curcpu()->ci_curlwp)
 #define curpcb			(curcpu()->ci_curpcb)
+#define curpm			(curcpu()->ci_curpm)
 
 static __inline register_t
 mfmsr(void)
Index: arch/powerpc/oea/genassym.cf
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/oea/genassym.cf,v
retrieving revision 1.6
diff -u -r1.6 genassym.cf
--- arch/powerpc/oea/genassym.cf	27 Aug 2003 20:20:07 -0000	1.6
+++ arch/powerpc/oea/genassym.cf	9 Nov 2003 17:54:44 -0000
@@ -170,6 +170,7 @@
 define	CI_SIZE		sizeof(struct cpu_info)
 define	CI_CURLWP	offsetof(struct cpu_info, ci_curlwp)
 define	CI_CURPCB	offsetof(struct cpu_info, ci_curpcb)
+define	CI_CURPM	offsetof(struct cpu_info, ci_curpm)
 define	CI_IDLE_PCB	offsetof(struct cpu_info, ci_idle_pcb)
 define	CI_ASTPENDING	offsetof(struct cpu_info, ci_astpending)
 define	CI_WANT_RESCHED	offsetof(struct cpu_info, ci_want_resched)
Index: arch/powerpc/oea/oea_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/oea/oea_machdep.c,v
retrieving revision 1.11
diff -u -r1.11 oea_machdep.c
--- arch/powerpc/oea/oea_machdep.c	12 Aug 2003 05:06:57 -0000	1.11
+++ arch/powerpc/oea/oea_machdep.c	9 Nov 2003 17:54:45 -0000
@@ -158,7 +158,7 @@
 	curpcb->pcb_vr.vscr = 0;
 	curpcb->pcb_vr.vrsave = 0;
 #endif
-	curpcb->pcb_pm = pmap_kernel();
+	curpm = curpcb->pcb_pm = pmap_kernel();
 
 	/*
 	 * Cause a PGM trap if we branch to 0.
Index: arch/powerpc/oea/pmap.c
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/oea/pmap.c,v
retrieving revision 1.16
diff -u -r1.16 pmap.c
--- arch/powerpc/oea/pmap.c	27 Oct 2003 23:35:41 -0000	1.16
+++ arch/powerpc/oea/pmap.c	9 Nov 2003 17:54:45 -0000
@@ -2101,6 +2101,15 @@
 	 * XXX Normally performed in cpu_fork().
 	 */
 	pcb->pcb_pm = pmap;
+
+	/*
+	 * In theory, the SR registers need only be valid on return
+	 * to user space wait to do them there.
+	 */
+	if (l == curlwp) {
+		/* Store pointer to new current pmap. */
+		curpm = pmap;
+	}
 }
 
 /*
Index: arch/powerpc/powerpc/locore_subr.S
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/powerpc/locore_subr.S,v
retrieving revision 1.23
diff -u -r1.23 locore_subr.S
--- arch/powerpc/powerpc/locore_subr.S	17 Oct 2003 22:21:38 -0000	1.23
+++ arch/powerpc/powerpc/locore_subr.S	9 Nov 2003 17:54:45 -0000
@@ -360,6 +360,8 @@
 	stptr	%r31,CI_CURLWP(%r7)
 	ldptr	%r4,L_ADDR(%r31)	/* put PCB addr in r4 */
 	stptr	%r4,CI_CURPCB(%r7)	/* indicate new pcb */
+	ldptr	%r3,PCB_PM(%r4)		/* save pmap pointer */
+	stptru	%r3,CI_CURPM(%r7)
 #if 0
 	li	%r3,CI_CURPCB
 #ifdef PPC_OEA64
@@ -423,8 +425,7 @@
 #if defined(PPC_IBM4XX)
 0:
 	GET_CPUINFO(%r3)
-	ldreg	%r3,CI_CURPCB(%r3)	/* Do we need a context? */
-	ldreg	%r3,PCB_PM(%r3)	
+	ldreg	%r3,CI_CURPM(%r3)	/* Do we need a context? */
 	ldreg	%r4,PM_CTX(%r3)
 	cmpwi	%r4,0
 #	mtspr	SPR_SPR0,4		/* Always keep the current ctx here */
Index: arch/powerpc/powerpc/trap_subr.S
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/powerpc/trap_subr.S,v
retrieving revision 1.51
diff -u -r1.51 trap_subr.S
--- arch/powerpc/powerpc/trap_subr.S	22 Oct 2003 17:27:58 -0000	1.51
+++ arch/powerpc/powerpc/trap_subr.S	9 Nov 2003 17:54:45 -0000
@@ -60,6 +60,8 @@
  * User segment table is loaded through a pointer to the current pmap.
  */
 #define RESTORE_USER_SRS(t0,t1)						\
+	GET_CPUINFO(t0);						\
+	ldptr	t0,CI_CURPM(t0);					\
 	ldreg	t0,PM_STEG(t0);						\
 	mtasr	t0
 
@@ -98,6 +100,8 @@
  * User SRs are loaded through a pointer to the current pmap.
  */
 #define RESTORE_USER_SRS(pmap,sr) \
+	GET_CPUINFO(pmap); \
+	ldptr	pmap,CI_CURPM(pmap); \
 	ldregu	sr,PM_SR(pmap); \
 	RESTORE_SRS(pmap,sr)
 
@@ -770,11 +774,6 @@
 /* Can't touch %r1 from here on */					\
 	mtsprg2	%r2;			/* save r2 & r3 */		\
 	mtsprg3	%r3;							\
-/* While the MMU is on, get the PMAP address and save it */		\
-	GET_CPUINFO(%r2);						\
-	ldptr	%r3,CI_CURPCB(%r2);					\
-	ldptr	%r3,PCB_PM(%r3);					\
-	stptr	%r3,(savearea+CPUSAVE_R28)(%r2);			\
 /* Disable translation, machine check and recoverability: */		\
 	mfmsr	%r2;							\
 	andi.	%r2,%r2,~(PSL_DR|PSL_IR|PSL_ME|PSL_RI)@l;		\
@@ -787,8 +786,6 @@
 	bf	17,1f;			/* branch if PSL_PR is false */	\
 /* Restore user SRs */							\
 	CPU601_KERN_LEAVE(%r2,%r3);					\
-	GET_CPUINFO(%r2);						\
-	ldreg	%r2,(savearea+CPUSAVE_R28)(%r2);			\
 	RESTORE_USER_SRS(%r2,%r3);					\
 1:	mfsprg1	%r2;			/* restore cr */		\
 	mtcr	%r2;							\
@@ -1011,9 +1008,9 @@
 	bl	_C_LABEL(extint_call)	/* to be filled in later */
 
 intr_exit:
-/* Disable interrupts (should already be disabled) and recoverability here: */
+/* Disable interrupts (should already be disabled) and MMU here: */
 	mfmsr	%r3
-	andi.	%r3,%r3,~(PSL_EE|PSL_ME|PSL_RI)@l
+	andi.	%r3,%r3,~(PSL_EE|PSL_ME|PSL_RI|PSL_DR|PSL_IR)@l
 	mtmsr	%r3
 	isync
 
@@ -1038,20 +1035,11 @@
 	addi	%r4,%r4,-1		/* adjust reentrancy count */
 	stint	%r4,CI_INTRDEPTH(%r5)
 
-	ldptr	%r3,CI_CURPCB(%r5)	/* access PCB while MMU is on */
-	ldptr	%r3,PCB_PM(%r3)		/* get pmap pointer */
-
-/* Now disable MMU */
-	mfmsr	%r4
-	andi.	%r4,%r4,~(PSL_DR|PSL_IR)@l
-	mtmsr	%r4
-	isync
-
 /* Returning to user mode? */
 	mtcr	%r6			/* saved SRR1 */
 	bf	17,1f			/* branch if PSL_PR is false */
 
-	CPU601_KERN_LEAVE(%r6,%r4)	/* leave r3 alone */
+	CPU601_KERN_LEAVE(%r3,%r4)
 	RESTORE_USER_SRS(%r3,%r4)
 	ldint	%r3,CI_ASTPENDING(%r5)	/* Test AST pending */
 	andi.	%r3,%r3,1