Subject: Re: g3 sound on macppc netbsd-1.6.1
To: Matt Thomas <matt@3am-software.com>
From: None <richard@uclinux.net>
List: port-macppc
Date: 10/21/2003 10:30:06
> 
> what's the output of
> 
> pcictl /dev/pci0 dump -d 13
> 
> 


Here it is:


-bash-2.05b$ pcictl /dev/pci0 dump -d 13
PCI configuration registers:
  Common header:
    0x00: 0x00351033 0x02100016 0x0c031041 0x00802008

    Vendor Name: NEC (0x1033)
    Device Name: USB Host Controller (0x0035)
    Command register: 0x0016
      I/O space accesses: off
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: on
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0x0210
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: serial bus (0x0c)
    Subclass Name: USB (0x03)
    Interface: 0x10
    Revision ID: 0x41
    BIST: 0x00
    Header Type: 0x00+multifunction (0x80)
    Latency Timer: 0x20
    Cache Line Size: 0x08

  Type 0 ("normal" device) header:
    0x10: 0x80803000 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x003514db
    0x30: 0x00000000 0x00000040 0x00000000 0x2a010100

    Base address register at 0x10
      type: 32-bit nonprefetchable memory
      base: 0x80803000, not sized
    Base address register at 0x14
      not implemented(?)
    Base address register at 0x18
      not implemented(?)
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x14db
    Subsystem ID: 0x0035
    Expansion ROM Base Address: 0x00000000
    Capability list pointer: 0x40
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x2a
    Minimum Grant: 0x01
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x00
    Capability register at 0x40
      type: 0x01 (Power Management, rev. 1.0)

  Device-dependent header:
    0x40: 0x7e020001 0x00000000 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0xc4303305 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000


rick