Subject: RE: For your edification...
To: 'Monroe Williams' <monroe@pobox.com>
From: Cliff Neighbors <cliff@allegronetworks.com>
List: port-macppc
Date: 02/13/2003 14:31:19
this won't work unless all access to `ipending' also use lwarx/stwcx
otherwise you will not detect and avoid the race.

	-cliff-

---
cliff neighbors
cliff@allegronetworks.com
408-281-5532
---

-----Original Message-----
From: Monroe Williams [mailto:monroe@pobox.com]
Sent: Thursday, February 13, 2003 2:31 PM
To: port-macppc@netbsd.org
Subject: For your edification...



I've started poking around in the interrupt handling code in macppc to see
if I can chase down the various problems I've had with devices that share an
irq on 7500-class machines.

I'd like to submit the following change for review and/or comments.  It's in
src/sys/arch/macppc/macppc/extintr.c.

(I don't think this will fix the problems I've seen.  The "someone should
fix this" comment just caught my eye and I thought I might be able to do
so.)

--- before ---

/* Following code should be implemented with lwarx/stwcx to avoid
 * the disable/enable. i need to read the manual once more.... */
void
softintr(ipl)
    int ipl;
{
    int msrsave;

    msrsave = mfmsr();
    mtmsr(msrsave & ~PSL_EE);
    ipending |= 1 << ipl;
    mtmsr(msrsave);
}

--- after ---

void
softintr(ipl)
    int ipl;
{
    u_int scratch;
    asm volatile (
        "1:  lwarx  %0, 0, %1;"
            "or     %0, %0, %2;"
            "stwcx. %0, 0, %1;"
            "bne- 1b;"
            : "+r"(scratch) : "r"(&ipending), "r"(1 << ipl));
}

---

I've been running this on one machine for a few hours so far, and it hasn't
caused any trouble yet.  This seems to be what whomever wrote the comment
had in mind, and the code is taken almost verbatim from the "Synchronization
Programming Examples" section of the PowerPC family reference manual.

I'd be interested in comments about the correctness of this change and its
possible impact on MP machines, as well as suggestions for a targeted
benchmark I could use to see if it has a measurable impact on performance.

This is one of my first attempts to use inline assembly from gcc, so
comments on the setup of the code would also be welcome.  (I've used inline
assembly extensively with other compilers, but gcc does things a bit
differently.)

Thanks,
-- monroe
------------------------------------------------------------------------
Monroe Williams                                         monroe@pobox.com