Subject: Re: FWB JackHammer PCI UltraSCSI interface
To: Erik E. Fair <fair@clock.org>
From: Matthew Jacob <mjacob@feral.com>
List: port-macppc
Date: 06/29/2001 07:53:41
If this is an onboard chip, that may explain it. There's lots of choices
about how to set up connected SRAM- there's a memory timing register one
sets. But I've never set it for other than 0x1212 and all boards I've
ever run across seem to work- even the PTI version that had a boatload
of fast SRAM (note the commented lines).

My theory here is that the MTR is off, so SRAM isn't being set up right.
This is an area in the isp driver that really isn't all that fancy but
i's hard to know what to change the memory timing register to.

-matt




On Fri, 29 Jun 2001, Erik E. Fair wrote:

> It's a Qlogic ISP1020A, I believe.
>
> 	Erik <fair@clock.org>
>