Subject: Re: G3 Powerbook (Pismo) Keyboard hangs?
To: None <mw@costello.cnf.CORNELL.EDU>
From: HEO SeonMeyong <seirios@matrix.iri.co.jp>
List: port-macppc
Date: 12/10/2000 04:46:52
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	Hi. this is HEO SeonMeyong writing.

mw> SUNAGAWA Keiki <kei_sun@ba2.so-net.ne.jp> was kind enough to build me a
mw> kernel with hacked keyboard drivers.  The built-in keyboard is kludged, so
mw> you have to wait about 20 seconds for it to be recognized (don't type
mw> before then). Otherwise, everything seems to work fine.

	I'm now using PB G3-500 2000 now.

	apply attached patch, and recompile kernel, Keyboard will work fine.
	WARNING. Do not type keyboard and not operate mouse pad before running getty.

% cd src/sys/arch/macppc
% patch -p < ADB.patch

	Regards.

HEO

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*** dev/adb.c	Mon Aug 16 15:28:09 1999
--- dev/adb.c	Mon Aug 14 22:58:26 2000
***************
*** 63,68 ****
--- 63,70 ----
  int	adb_debug = 0;		/* Output debugging messages */
  #endif /* ADB_DEBUG */
  
+ char *gpio_reg;
+ 
  /*
   * Driver definition.
   */
***************
*** 112,117 ****
--- 114,120 ----
  	extern volatile u_char *Via1Base;
  
  	ca->ca_reg[0] += ca->ca_baseaddr;
+ 	gpio_reg = (char *)0x50 + ca->ca_baseaddr;
  
  	sc->sc_regbase = mapiodev(ca->ca_reg[0], ca->ca_reg[1]);
  	Via1Base = sc->sc_regbase;
***************
*** 125,130 ****
--- 128,134 ----
  	ADBReInit();
  
  	intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_HIGH, adb_intr, sc);
+ 	intr_establish(0x2f, IST_LEVEL, IPL_HIGH, adb_intr, sc);
  
  #ifdef ADB_DEBUG
  	if (adb_debug)


*** dev/pm_direct.c	Fri Jun  9 07:10:46 2000
--- dev/pm_direct.c	Mon Aug 14 22:57:40 2000
***************
*** 818,823 ****
--- 818,824 ----
  	return rval;
  }
  
+ extern char *gpio_reg;
  
  /*
   * My PM interrupt routine for the PB Duo series and the PB 5XX series
***************
*** 828,835 ****
--- 829,861 ----
  	int s;
  	int rval;
  	PMData pmdata;
+ 	u_int ifr, gpio;
  
  	s = splhigh();
+ 
+ start:
+ 	ifr = read_via_reg(VIA1, vIFR);
+ 
+ 	if (ifr == 0) goto LLL;
+ 
+ 	if (ifr & 0x04) {
+ 		write_via_reg(VIA1, vIFR, 0x04);
+ 		delay(150000);
+ 	} else if (ifr & 0x10) {
+ 		write_via_reg(VIA1, vIFR, 0x10);
+ 	}
+ 
+ 	ifr &= ~0x14;
+ 	if (ifr)
+ 		write_via_reg(VIA1, vIFR, ifr);
+ 	goto start;
+ 
+ LLL:
+ 	gpio = in8(gpio_reg + 0x9);
+ 	if ((gpio & 0x02) != 0) {
+ 		splx(s);
+ 		return;
+ 	}
  
  	PM_VIA_CLR_INTR();			/* clear VIA1 interrupt */
  						/* ask PM what happend */


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