On Wed, Aug 2, 2000, Greg Kritsch <greg@evertz.com> wrote:

>All exception handling on the PowerPC starts off with translation disabled,
>hence the convenience of having the 1:1 mapping.  There's no valid way to
>enable translation without at least some 1:1 mapped code, or at least that's
>my understanding of the programming environment.

Well, 1:1 is not necessary, but indeed, the kernel code must be contiguous.
Then, handling relocation is a matter of adding/substracting a known constant.
For example, Linux/PCC kernel is at 0 physical, mapped at 0xc0000000 virtual.
Having physical == virtual makes things simpler.

>Also, the 1:1 mapping uses a BAT register, which requires no memory accesses
>for address translation, which makes it faster than using PTEs to map the
>kernel.  The kernel is, after all, aware of the architecture of the machine
>so it is not a "hack" to take advantage of such a performance improvement.

Yep. If someone is interested in this,  Cort Dougan and Paul Mackerras
(maintainers
of the Linux/PPC arch) wrote a paper about optimisations they did, with
real bench
numbers. Mapping the kernel with a BAT significantly reduced the TLB
pressure, and
that's especially noticeable on 603-like CPUs that rely on software for
reloading them.

I can try to find that URL for this paper, if it still exist.