Subject: Re: MI SONIC Ethernet driver for mac68k
To: None <thorpej@shagadelic.org>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: port-mac68k
Date: 06/07/2007 21:45:27
thorpej@shagadelic.org wrote:
> >> Summary:
> >> TX on sn0 RX on sn0
> >> MD: 1026KB/s 846KB/s
> >> MI: 793KB/s 854KB/s
> >
> > more results:
> >
> > MI driver with BUS_DMA_COHERENT support:
> > TX on sn0 RX on sn0
> > 842KB/s 888KB/s
> >
> > MI driver with BUS_DMA_COHERENT support and 16bytes TX DMA threshold:
> > TX on sn0 RX on sn0
> > 903KB/s 886KB/s
>
> Not too bad! Please check in the bus_dma enhancements!
Thanks, I'll do soon.
One more (last?) result here:
MI driver with BUS_DMA_COHERENT support, 16bytes TX DMA threshold,
and properly inlined DCFL/DCFP/DCPL/DCPP cache flush/purge ops:
TX on sn0 RX on sn0
951KB/s 918KB/s
I think it's acceptable enough to replace MD one..
---
# dmesg|grep sn0
sn0 at obio0: integrated SONIC Ethernet adapter
sn0: Ethernet address 08:00:07:9f:07:c6
# ./ttcp -rs
ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
ttcp-r: socket
ttcp-r: accept from 192.168.20.1
ttcp-r: 16777216 bytes in 17.85 real seconds = 917.69 KB/sec +++
ttcp-r: 2049 I/O calls, msec/call = 8.92, calls/sec = 114.77
ttcp-r: 0.0user 17.7sys 0:17real 99% 0i+0d 0maxrss 0+2pf 0+0csw
# ./ttcp -ts 192.168.20.1
ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp -> 192.168.20.1
ttcp-t: socket
ttcp-t: connect
ttcp-t: 16777216 bytes in 17.23 real seconds = 951.07 KB/sec +++
ttcp-t: 2048 I/O calls, msec/call = 8.61, calls/sec = 118.88
ttcp-t: 0.1user 16.8sys 0:17real 98% 0i+0d 0maxrss 0+4098pf 0+0csw
#
---
Izumi Tsutsui
---
Index: arch/m68k/include/cacheops.h
===================================================================
RCS file: /cvsroot/src/sys/arch/m68k/include/cacheops.h,v
retrieving revision 1.11
diff -u -r1.11 cacheops.h
--- arch/m68k/include/cacheops.h 11 Dec 2005 12:17:53 -0000 1.11
+++ arch/m68k/include/cacheops.h 7 Jun 2007 12:33:24 -0000
@@ -83,20 +83,12 @@
#elif defined(M68040)
-#define DCFA() DCFA_40()
-#define DCFL(pa) DCFL_40((pa))
-#define DCFP(pa) DCFP_40((pa))
#define DCIA() DCIA_40()
#define DCIAS(pa) DCIAS_40((pa))
#define DCIS() DCIS_40()
#define DCIU() DCIU_40()
-#define DCPA() DCPA_40()
-#define DCPL(pa) DCPL_40((pa))
-#define DCPP(pa) DCPP_40((pa))
#define ICIA() ICIA_40()
#define ICPA() ICPA_40()
-#define ICPL(pa) ICPL_40((pa))
-#define ICPP(pa) ICPP_40((pa))
#define PCIA() PCIA_40()
#define TBIA() TBIA_40()
#define TBIAS() TBIAS_40()
@@ -129,20 +121,12 @@
#else /* M68K_CACHEOPS_NTYPES == 1 */
-#define DCFA() _DCFA()
-#define DCFL(pa) _DCFL((pa))
-#define DCFP(pa) _DCFP((pa))
#define DCIA() _DCIA()
#define DCIAS(pa) _DCIAS((pa))
#define DCIS() _DCIS()
#define DCIU() _DCIU()
-#define DCPA() _DCPA()
-#define DCPL(pa) _DCPL((pa))
-#define DCPP(pa) _DCPP((pa))
#define ICIA() _ICIA()
#define ICPA() _ICPA()
-#define ICPL(pa) _ICPL((pa))
-#define ICPP(pa) _ICPP((pa))
#define PCIA() _PCIA()
#define TBIA() _TBIA()
#define TBIAS() _TBIAS()
@@ -151,24 +135,34 @@
#endif /* M68K_CACHEOPS_NTYPES == 1 */
-void _DCFA(void);
-void _DCFL(paddr_t);
-void _DCFP(paddr_t);
void _DCIA(void);
void _DCIAS(paddr_t);
void _DCIS(void);
void _DCIU(void);
-void _DCPA(void);
-void _DCPL(paddr_t);
-void _DCPP(paddr_t);
void _ICIA(void);
void _ICPA(void);
-void _ICPL(paddr_t);
-void _ICPP(paddr_t);
void _PCIA(void);
void _TBIA(void);
void _TBIAS(void);
void _TBIAU(void);
void _TBIS(vaddr_t);
+
+#if defined(M68040) || defined(M68060)
+
+/*
+ * These cache ops are identical between M68040 and M68060
+ * and not available on M68020 and M68030 so no need to check cputype.
+ */
+#define DCFA() DCFA_40()
+#define DCPA() DCPA_40()
+#define ICPL(pa) ICPL_40(pa)
+#define ICPP(pa) ICPP_40(pa)
+#define DCPL(pa) DCPL_40(pa)
+#define DCPP(pa) DCPP_40(pa)
+#define DCFL(pa) DCFL_40(pa)
+#define DCFP(pa) DCFP_40(pa)
+
+#endif
+
#endif /* _M68K_CACHEOPS_H_ */
Index: arch/m68k/include/cacheops_60.h
===================================================================
RCS file: /cvsroot/src/sys/arch/m68k/include/cacheops_60.h,v
retrieving revision 1.7
diff -u -r1.7 cacheops_60.h
--- arch/m68k/include/cacheops_60.h 16 Feb 2006 20:17:13 -0000 1.7
+++ arch/m68k/include/cacheops_60.h 7 Jun 2007 12:33:24 -0000
@@ -156,69 +156,11 @@
__asm volatile (" .word 0xf478;"); /* cpusha dc */
}
-static __inline void __attribute__((__unused__))
-DCFA_60(void)
-{
- __asm volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-/* invalidate instruction physical cache line */
-static __inline void __attribute__((__unused__))
-ICPL_60(paddr_t pa)
-{
- register paddr_t r_pa __asm("%a0") = pa;
-
- __asm volatile (" .word 0xf488;" : : "a" (r_pa)); /* cinvl ic,%a0@ */
-}
-
-/* invalidate instruction physical cache page */
-static __inline void __attribute__((__unused__))
-ICPP_60(paddr_t pa)
-{
- register paddr_t r_pa __asm("%a0") = pa;
-
- __asm volatile (" .word 0xf490;" : : "a" (r_pa)); /* cinvp ic,%a0@ */
-}
-
-/* invalidate data physical cache line */
-static __inline void __attribute__((__unused__))
-DCPL_60(paddr_t pa)
-{
- register paddr_t r_pa __asm("%a0") = pa;
-
- __asm volatile (" .word 0xf448;" : : "a" (r_pa)); /* cinvl dc,%a0@ */
-}
-
-/* invalidate data physical cache page */
-static __inline void __attribute__((__unused__))
-DCPP_60(paddr_t pa)
-{
- register paddr_t r_pa __asm("%a0") = pa;
-
- __asm volatile (" .word 0xf450;" : : "a" (r_pa)); /* cinvp dc,%a0@ */
-}
-
-/* invalidate data physical all */
-static __inline void __attribute__((__unused__))
-DCPA_60(void)
-{
- __asm volatile (" .word 0xf458;"); /* cinva dc */
-}
-
-/* data cache flush line */
-static __inline void __attribute__((__unused__))
-DCFL_60(paddr_t pa)
-{
- register paddr_t r_pa __asm("%a0") = pa;
-
- __asm volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,%a0@ */
-}
-
-/* data cache flush page */
-static __inline void __attribute__((__unused__))
-DCFP_60(paddr_t pa)
-{
- register paddr_t r_pa __asm("%a0") = pa;
-
- __asm volatile (" .word 0xf470;" : : "a" (r_pa)); /* cpushp dc,%a0@ */
-}
+#define DCFA_60() DCFA_40()
+#define DCPA_60() DCPA_40()
+#define ICPL_60(pa) ICPL_40(pa)
+#define ICPP_60(pa) ICPP_40(pa)
+#define DCPL_60(pa) DCPL_40(pa)
+#define DCPP_60(pa) DCPP_40(pa)
+#define DCFL_60(pa) DCFL_40(pa)
+#define DCFP_60(pa) DCFP_40(pa)
Index: arch/m68k/m68k/cacheops.c
===================================================================
RCS file: /cvsroot/src/sys/arch/m68k/m68k/cacheops.c,v
retrieving revision 1.11
diff -u -r1.11 cacheops.c
--- arch/m68k/m68k/cacheops.c 22 Jul 2006 06:36:06 -0000 1.11
+++ arch/m68k/m68k/cacheops.c 7 Jun 2007 12:33:24 -0000
@@ -404,156 +404,3 @@
#endif
}
}
-
-#if defined(M68040) || defined(M68060)
-void
-_DCFA(void)
-{
-
- switch (cputype) {
-#ifdef M68040
- case CPU_68040:
- DCFA_40();
- break;
-#endif
-#ifdef M68060
- case CPU_68060:
- DCFA_60();
- break;
-#endif
- }
-}
-
-void
-_DCPA(void)
-{
-
- switch (cputype) {
- default:
-#ifdef M68040
- case CPU_68040:
- DCPA_40();
- break;
-#endif
-#ifdef M68060
- case CPU_68060:
- DCPA_60();
- break;
-#endif
- }
-}
-
-void
-_ICPL(paddr_t pa)
-{
-
- switch (cputype) {
- default:
-#ifdef M68040
- case CPU_68040:
- ICPL_40(pa);
- break;
-#endif
-#ifdef M68060
- case CPU_68060:
- ICPL_60(pa);
- break;
-#endif
- }
-}
-
-void
-_ICPP(paddr_t pa)
-{
-
- switch (cputype) {
- default:
-#ifdef M68040
- case CPU_68040:
- ICPP_40(pa);
- break;
-#endif
-#ifdef M68060
- case CPU_68060:
- ICPP_60(pa);
- break;
-#endif
- }
-}
-
-void
-_DCPL(paddr_t pa)
-{
-
- switch (cputype) {
- default:
-#ifdef M68040
- case CPU_68040:
- DCPL_40(pa);
- break;
-#endif
-#ifdef M68060
- case CPU_68060:
- DCPL_60(pa);
- break;
-#endif
- }
-}
-
-void
-_DCPP(paddr_t pa)
-{
-
- switch (cputype) {
- default:
-#ifdef M68040
- case CPU_68040:
- DCPP_40(pa);
- break;
-#endif
-#ifdef M68060
- case CPU_68060:
- DCPP_60(pa);
- break;
-#endif
- }
-}
-
-void
-_DCFL(paddr_t pa)
-{
-
- switch (cputype) {
- default:
-#ifdef M68040
- case CPU_68040:
- DCFL_40(pa);
- break;
-#endif
-#ifdef M68060
- case CPU_68060:
- DCFL_60(pa);
- break;
-#endif
- }
-}
-
-void
-_DCFP(paddr_t pa)
-{
-
- switch (cputype) {
- default:
-#ifdef M68040
- case CPU_68040:
- DCFP_40(pa);
- break;
-#endif
-#ifdef M68060
- case CPU_68060:
- DCFP_60(pa);
- break;
-#endif
- }
-}
-#endif /* M68040 || M68060 */