Subject: Re: date and time
To: Henry B. Hotz <hotz@jpl.nasa.gov>
From: Allen Briggs <briggs@ninthwonder.com>
List: port-mac68k
Date: 02/03/2000 19:51:58
[ Hi, Henry.  I think this is probably of general interest, even though
  this discussion pops up from time to time, so I'm copying to the
  port-mac68k list. ]

The pre-quadra macs all have basically the following interrupt levels:

0 - no interrupt, normal processing
1 - VIA1
2 - VIA2 (or RBV or other VIA2 replacements)
3 - unused
4 - SCC
5 - unused
6 - unused
7 - NMI

The VIAs group most of the interrupts.  VIA2 contains the SCSI and NuBUS,
and VIA1 contains just about everything else, if I remember correctly.
What we'd have to do in order to get the clock to run reasonably, I
think, is to either:

	1. Keep track of time in the interrupt handlers (this could be
	   done by using one of the VIA timers in a free-running mode), 
	   then increment the clock appropriately after the interrupt, or

	2. For all interrupts, do the absolute minimum necessary, scheduling
	   a soft interrupt for further processing whenever we have time-
	   consuming tasks.

The second option should be what we're doing anyway, but I'm not sure
that we are--or can.  We will probably still need to block interrupts
for the duration of SCSI transfers which are probably where we're losing
the clock interrupts to begin with.  This is due to the nature of the
implementation of the pseudo-DMA SCSI transfers.

So, we could probably stop the clock lossage by doing #1.  However,
part of the challenge will be to do this in such a way that it has a
minimal impact on performance, and avoids wierd clock behavior (i.e.,
will it hurt anything to not call hardclock() for a 15 jiffies, then
call it 15 times back-to-back?).

-allen