> I'm pretty sure the 33.6 number includes the framing and other overhead of
> how the data is coded on the line.  The Zilog chip has a 4 byte (3 usable)
> fifo so you have a little leeway in responding to the interrupts.  I think
> if you only responded to exactly every third interrupt it would still work
> perfectly.  Anyone know if they deepened the fifo on the later replacements
> like the AV?

I think they deepened the FIFO on the AV's for the DMA engine. The DBDMA
engine (which is in the PCI PMacs) does 32-bit transfers. I bet the PSC
DMA is close.

I think a simpler thing would be to just support DMA on these things.

Does anyone know of a used 660AV I could buy? :-)

> What Bill S. has coaxed out of the serial driver is actually pretty impressive.

Thanks!

Take care,

Bill