I've been running with that line commented out of my config file for a
long time now, with no wierd results.  It certainly boots up just fine.

Of course, I don't know if the cache was ever actually enabled (I assume
that MacOS would have to do this, and with my cache card that means a
MacOS system extension;  I always boot with extensions off when I'm
going to use NetBSD).  All I know is that that particular option prevents
NetBSD from explicitly disabling the cache.

On Wed, 8 Oct 1997, Colin Wood wrote:

> Christopher R. Bowman wrote:
> > 
> > On Wed, 8 Oct 1997, Colin Wood wrote:
> > 
> > > David G Taylor wrote:
> > > > 
> > > > Will an external cache card work in a Mac IIci ?
> > > > 
> > > > I have it enabled in MacOS, but I notice the generic 1.2.1 kernal has
> > > > external cache disabled:
> > > > options         DISABLE_EXT_CACHE # Don't use IIci external cache
> > > > 
> > > > ? Any experience here appreciated.
> > > 
> > > At the moment, no, it won't.  The problem is that I don't think there is
> > > any code in locore.s to flush the cache when necessary (the only time it's
> > > necessary actually, is during boot).  I think that the machine will hang
> > > if you try to boot with the cache enabled.  However, I could be wrong,
> > > it's been a while since I've played with turning one on.
> > > 
> > 
> > Sorry, but I thnk your wrong, are you sure enough that I should open
> > my machine to double check? 
> 
> Just in case I've confused people, I don't think that a IIci with an
> external cache will boot on a kernel with the
> 
> options 	DISABLE_EXT_CACHE
> 
> line removed or commented out.  If you have compiled a custom kernel with
> this line removed and/or commented out and it works for you, please let me
> know.  I haven't tried to boot my machine with only a cache card in quite
> a while, so I'm not 100% positive on this one.  Currently I use a Daystar
> accelerator (not that it makes much of a difference w/o the cache :-), and
> if I enable the cache on it, it will hang during boot around the copyright
> message.  Although I have some code from Kevin Radke which I've hacked on
> a little bit to enable the cache, it seemed to make my system somewhat
> unstable on the whole.  I would think that the standard IIci cache would
> have similar problems since both are a physically addresses
> cache...however, I could easily be wrong.
> 
> Does this explain things?  Anyone with more of a clue than I, please clue
> me in!
> 
> Later.
> 
> -- 
> Colin Wood                                 cwood@ichips.intel.com
> Component Design Engineer - MD6                 Intel Corporation
> -----------------------------------------------------------------
> I speak only on my own behalf, not for my employer.
> 

-----------------------------------------------------------------------------
| Paul Goyette       | PGP Public Key fingerprint:  | E-mail addresses:     |
| Network Consultant |     0E 40 D2 FC 2A 13 74 A0  |  paul@whooppee.com    |
| and kernel hacker  |     E4 69 D5 BE 65 E4 56 C6  |  paul_goyette@ins.com |
-----------------------------------------------------------------------------