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On Wed, Jan 04, 2006 at 10:00:11AM +1100, James Haggerty wrote:
> > See http://www.netbsd.org/cgi-bin/query-pr-single.pl?number=23192 for
> > details. I didn't have time to look at a proper fix for this yet.
> >
> 
> Hmm, as I said in a follow up email, the patch there looks out of date:
> current NetBSD code is substantially different, and there appears to be no
> equivalent to 'WDC_CAPABILITY_MODE'. Or I just don't know what it is.

Ha yes, lots of things have changed since then. Can you try the attached
patch ? It should definitively fix the issue, but I've no way to test it.

-- 
Manuel Bouyer <bouyer@antioche.eu.org>
     NetBSD: 26 ans d'experience feront toujours la difference
--

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Index: pciide_pnpbios.c
===================================================================
RCS file: /cvsroot/src/sys/arch/i386/pnpbios/pciide_pnpbios.c,v
retrieving revision 1.20
diff -u -r1.20 pciide_pnpbios.c
--- pciide_pnpbios.c	11 Dec 2005 12:17:47 -0000	1.20
+++ pciide_pnpbios.c	4 Jan 2006 22:05:52 -0000
@@ -54,7 +54,6 @@
 
 static int	pciide_pnpbios_match(struct device *, struct cfdata *, void *);
 static void	pciide_pnpbios_attach(struct device *, struct device *, void *);
-void		pciide_pnpbios_setup_channel(struct ata_channel *);
 
 extern void	pciide_channel_dma_setup(struct pciide_channel *);
 extern int	pciide_dma_init(void *, int, int, void *, size_t, int);
@@ -91,7 +90,8 @@
 	struct wdc_regs *wdr;
 	bus_space_tag_t compat_iot;
 	bus_space_handle_t cmd_baseioh, ctl_ioh;
-	int i;
+	int i, drive;
+	u_int8_t idedma_ctl;
 
 	printf("\n");
 	pnpbios_print_devres(self, aa);
@@ -125,12 +125,9 @@
 	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
-        sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
-        sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;		/* XXX */
-        sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;	/* XXX */
-#if 0 /* XXX */
-	sc->sc_wdcdev.set_modes = pciide_pnpbios_setup_channel;
-#endif
+        sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
+        sc->sc_wdcdev.sc_atac.atac_dma_cap = 0;		/* XXX */
+        sc->sc_wdcdev.sc_atac.atac_udma_cap = 0;	/* XXX */
 
 	wdc_allocate_regs(&sc->sc_wdcdev);
 
@@ -170,13 +167,31 @@
 					pciide_compat_intr, cp);
 
 	wdcattach(wdc_cp);
-}
-
-void
-pciide_pnpbios_setup_channel(chp)
-	struct ata_channel *chp;
-{
-	struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
 
-	pciide_channel_dma_setup(cp);
+	idedma_ctl = 0;
+	for (drive = 0; drive < cp->ata_channel.ch_ndrive; drive++) {
+		/*
+		 * we have not probed the drives yet,
+		 * allocate ressources for all of them.
+		 */
+		if (pciide_dma_table_setup(sc, 0, drive) != 0) {
+			/* Abort DMA setup */
+			aprint_error(
+			    "%s:%d:%d: can't allocate DMA maps, "
+			    "using PIO transfers\n",
+			    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
+			    0, drive);
+			sc->sc_dma_ok = 0;
+			sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA;
+			sc->sc_wdcdev.irqack = NULL;
+			idedma_ctl = 0;
+			break;
+		}
+		idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
+	}
+	if (idedma_ctl != 0) {
+		/* Add software bits in status register */
+		bus_space_write_1(sc->sc_dma_iot,
+		    cp->dma_iohs[IDEDMA_CTL], 0, idedma_ctl);
+	}
 }

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