Subject: Re: ioapic and interrupt lines
To: Frank van der Linden <email@example.com>
From: Manuel Bouyer <firstname.lastname@example.org>
Date: 09/09/2005 19:14:11
On Fri, Sep 09, 2005 at 04:44:14PM +0200, Frank van der Linden wrote:
> Manuel Bouyer wrote:
> >Does anyone know if an interrupt > 31 is valid on current i386 hardware ?
> >>From what I can see in our i386 code, it 0-15 for legacy more, or
> >0-31 for ioapic.
> Hey Manuel,
> That depends on the ioapic. The theoretical maximum is 255, since 8 bits
> in register 0x01 of an ioapic determine the maximum size. I've not seen
> ioapics with more than 24 lines for normal systems, though.
> What's your context? There's also the ACPI "global interrupt number",
> which can be bigger, since it assigns a unique number to all interrupts
> in the system. That can certainly be bigger than 31, though it's
> software only.
The context is a problem reported with a Xen user. In NetBSD/Xen the
number of physical interrupts is set to 32 (this is used to size
static arrays), but on this system there are PCI devices with interrupts
in the 40-50 range. A i386 GENERIC kernel on the same hardware use interrupts
in the 1-15 range, so I guess the Xen kernel is rerouting interrupts,
but I wonder from where such high numbers come from. I also wonder to which
size I should set these statical arrays, and how NetBSD/i386 can deal with
this, as i386/vector.S only defines interrupts from 0 to 31.
Manuel Bouyer <email@example.com>
NetBSD: 26 ans d'experience feront toujours la difference