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Sorry for being late, seems to work fine here. I'll atach the dmesg,
maybe it's usefull. Wanna thank Bang Jun-Young for his support and patch.

Thank you.

----- Mensaje Original -----
De: Bang Jun-Young <junyoung@netbsd.org>
Fecha: Viernes, Diciembre 6, 2002 7:44 am
Asunto: CPUID patch for recent Intel processors

> Hi,
> 
> People have complaint that NetBSD doesn't properly identify their 
> Intelprocessors. I made a patch to address that, here it is:
> 
> Index: machdep.c
> ===================================================================
> RCS file: /cvsroot/syssrc/syretrieving revision 1.502
> diff -u -r1.502 machdep.c
> --- machdep.c        2002/12/06 05:03:02        1.502
> +++ machdep.c        2002/12/06 06:42:06
> @@ -315,8 +315,17 @@
>         "Celeron",            /* Intel (R) Celeron (TM) processor */
>         "Pentium III",      /* Intel (R) Pentium (R) III 
> processor */
>         "Pentium III Xeon", /* Intel (R) Pentium (R) III Xeon 
> (TM) processor */
> -        "", "", "",            /* Reserved */
> -        "Pentium 4"            /* Intel (R) Pentium (R) 4 
> processor */
> +        "Pentium III",      /* Intel (R) Pentium (R) III 
> processor */
> +        "",                    /* Reserved */
> +        "Mobile Pentium III", /* Mobile Intel (R) Pentium (R) III 
> processor-M */
> +        "Mobile Celeron",   /* Mobile Intel (R) Celeron (R) 
> processor */    
> +        "Pentium 4",            /* Intel (R) Pentium (R) 4 
> processor */
> +        "Pentium 4",            /* Intel (R) Pentium (R) 4 
> processor */
> +        "Celeron",            /* Intel (R) Celeron (TM) processor */
> +        "Xeon",                    /* Intel (R) Xeon (TM) 
> processor */
> +        "Xeon MP",            /* Intel (R) Xeon (TM) processor MP */
> +        "Mobile Pentium 4", /* Mobile Intel (R) Pentium (R) 4 
> processor-M */
> +        "Mobile Celeron",   /* Mobile Intel (R) Celeron (R) 
> processor */
> };
> 
> /*
> @@ -344,6 +353,8 @@
> static void via_cpu_probe __P((struct cpu_info *));
> static void amd_family6_probe __P((struct cpu_info *));
> 
> +static const char *intel_family6_name __P((struct cpu_info *));
> +
> static void transmeta_cpu_info __P((struct cpu_info *));
> static void amd_cpu_cacheinfo __P((struct cpu_info *));
> 
> @@ -1122,6 +1133,62 @@
>         }
> }
> 
> +const char *
> +intel_family6_name(struct cpu_info *ci)
> +{
> +        int model = CPUID2MODEL(ci->ci_signature);
> +        const char *ret = NULL;
> +        u_int l2cache = ci->ci_cinfo[CAI_L2CACHE].cai_totalsize;
> +
> +        switch (model) {
> +        case 5:
> +                switch (l2cache) {
> +                case 0:
> +                case 128 * 1024:
> +                        ret = "Celeron (Covington)";
> +                        break;
> +                case 256 * 1024:
> +                        ret = "Mobile Pentium II (Dixon)";
> +                        break;
> +                case 512 * 1024:
> +                        ret = "Pentium II";
> +                        break;
> +                case 1 * 1024 * 1024:
> +                case 2 * 1024 * 1024:
> +                        ret = "Pentium II Xeon";
> +                        break;
> +                }
> +                break;
> +        case 6:
> +                switch (l2cache) {
> +                case 256 * 1024:
> +                        ret = "Mobile Pentium II";
> +                        break;
> +                case 512 * 1024:
> +                        ret = "Mobile Pentium II w/512 KB L2 cache";
> +                        break;
> +                }
> +                break;
> +        case 7:
> +                switch (l2cache) {
> +                case 512 * 1024:
> +                        ret = "Pentium III";
> +                        break;
> +                case 1 * 1024 * 1024:
> +                case 2 * 1024 * 1024:
> +                        ret = "Pentium III Xeon";
> +                        break;
> +                }
> +                break;
> +        case 8:
> +                if (ci->ci_brand_id && ci->ci_brand_id < 0x10)
> +                        ret = i386_intel_brand[ci->ci_brand_id];
> +                break;
> +        }
> +
> +        return (ret);
> +}
> +
> static void
> cpu_probe_base_features(struct cpu_info *ci)
> {
> @@ -1724,7 +1791,7 @@
>         } else {
>                 max = sizeof (i386_cpuid_cpus) / sizeof 
> (i386_cpuid_cpus[0]);                 modif = (ci->ci_signature >> 
> 12) & 0x3;
> -                family = (ci->ci_signature >> 8) & 0xf;
> +                family = CPUID2FAMILY(ci->ci_signature);
>                 if (family < CPU_MINFAMILY)
>                         panic("identifycpu: strange family value");
>                 model = CPUID2MODEL(ci->ci_signature);
> @@ -1772,14 +1839,12 @@
>                         ci->cpu_setup = cpufam->cpu_setup;
>                         ci->ci_info = cpufam->cpu_info;
> 
> -                        /*
> -                         * Intel processors family >= 6, model 8 
> allow to
> -                         * recognize brand by Brand ID value.
> -                         */
> -                        if (vendor == CPUVENDOR_INTEL && family 
> >= 6 &&
> -                            model >= 8 && ci->ci_brand_id &&
> -                            ci->ci_brand_id < 8)
> -                                brand = i386_intel_brand[ci-
> >ci_brand_id];+                        if (vendor == 
> CPUVENDOR_INTEL && family == 6 &&
> +                            model >= 5 && model <= 8) {
> +                                const char *tmp = 
> intel_family6_name(ci);+                                if (tmp != 
> NULL)+                                        name = tmp;
> +                        }
>                         
>                         if (vendor == CPUVENDOR_AMD && family == 
> 6 &&
>                             model >= 6) {
> 
> Since I have no Intel processor based machine at home, I can't 
> test the
> patch myself. I'd appreciate it if you Intel users would do it.
> 
> Jun-Young
> 
> -- 
> Bang Jun-Young <junyoung@netbsd.org>
> 


----1b994ed9317776b3
Content-Type: application/octet-stream
Content-Transfer-Encoding: base64
Content-Disposition: attachment; filename="dmesg.current"

TmV0QlNEIDEuNksgKEdFTkVSSUMpICMwOiBXZWQgRGVjIDE4IDEyOjM3OjI4IENFVCAyMDAy
CiAgICByb290QG5vdGVib29rLnZ2ei54czRhbGwubmw6L3Vzci9zcmMvc3lzL2FyY2gvaTM4
Ni9jb21waWxlL0dFTkVSSUMKdG90YWwgbWVtb3J5ID0gMTI3IE1CCmF2YWlsIG1lbW9yeSA9
IDExMSBNQgp1c2luZyAxNjU4IGJ1ZmZlcnMgY29udGFpbmluZyA2NjMyIEtCIG9mIG1lbW9y
eQpCSU9TMzIgcmV2LiAwIGZvdW5kIGF0IDB4ZjAwMDAKbWFpbmJ1czAgKHJvb3QpCmNwdTAg
YXQgbWFpbmJ1czA6ICh1bmlwcm9jZXNzb3IpCmNwdTA6IEludGVsIE1vYmlsZSBQZW50aXVt
IElJICg2ODYtY2xhc3MpLCAzMzMuMzcgTUh6LCBpZCAweDY2YQpjcHUwOiBmZWF0dXJlcyAx
ODNmOWZmPEZQVSxWTUUsREUsUFNFLFRTQyxNU1IsUEFFLE1DRSxDWDgsU0VQLE1UUlI+CmNw
dTA6IGZlYXR1cmVzIDE4M2Y5ZmY8UEdFLE1DQSxDTU9WLFBBVCxQU0UzNixNTVg+CmNwdTA6
IGZlYXR1cmVzIDE4M2Y5ZmY8RlhTUj4KY3B1MDogSS1jYWNoZSAxNiBLQiAzMmIvbGluZSA0
LXdheSwgRC1jYWNoZSAxNiBLQiAzMmIvbGluZSA0LXdheQpjcHUwOiBMMiBjYWNoZSAyNTYg
S0IgMzJiL2xpbmUgNC13YXkKY3B1MDogSVRMQiAzMiA0IEtCIGVudHJpZXMgNC13YXksIDIg
NCBNQiBlbnRyaWVzIGZ1bGx5IGFzc29jaWF0aXZlCmNwdTA6IERUTEIgNjQgNCBLQiBlbnRy
aWVzIDQtd2F5LCA4IDQgTUIgZW50cmllcyA0LXdheQpjcHUwOiAxNiBwYWdlIGNvbG9ycwpw
Y2kwIGF0IG1haW5idXMwIGJ1cyAwOiBjb25maWd1cmF0aW9uIG1vZGUgMQpwY2kwOiBpL28g
c3BhY2UsIG1lbW9yeSBzcGFjZSBlbmFibGVkLCByZC9saW5lLCByZC9tdWx0LCB3ci9pbnYg
b2sKcGNoYjAgYXQgcGNpMCBkZXYgMCBmdW5jdGlvbiAwCnBjaGIwOiBJbnRlbCA4MjQ0M0JY
IEhvc3QgQnJpZGdlL0NvbnRyb2xsZXIgKEFHUCBkaXNhYmxlZCkgKHJldi4gMHgwMykKY2Ji
MCBhdCBwY2kwIGRldiA0IGZ1bmN0aW9uIDA6IFRleGFzIEluc3RydW1lbnRzIFBDSTEyMTEg
UENJLUNhcmRCdXMgQnJpZGdlIChyZXYuIDB4MDApCnZnYTEgYXQgcGNpMCBkZXYgNSBmdW5j
dGlvbiAwOiBBVEkgVGVjaG5vbG9naWVzIDNEIFJhZ2UgTFQgUHJvIChyZXYuIDB4ZGMpCndz
ZGlzcGxheTAgYXQgdmdhMSBrYmRtdXggMTogY29uc29sZSAoODB4MjUsIHZ0MTAwIGVtdWxh
dGlvbikKd3NtdXgxOiBjb25uZWN0aW5nIHRvIHdzZGlzcGxheTAKcGNpYjAgYXQgcGNpMCBk
ZXYgNyBmdW5jdGlvbiAwCnBjaWIwOiBJbnRlbCA4MjM3MUFCIFBDSS10by1JU0EgQnJpZGdl
IChQSUlYNCkgKHJldi4gMHgwMikKcGNpaWRlMCBhdCBwY2kwIGRldiA3IGZ1bmN0aW9uIDE6
IEludGVsIDgyMzcxQUIgSURFIGNvbnRyb2xsZXIgKFBJSVg0KSAocmV2LiAweDAxKQpwY2lp
ZGUwOiBidXMtbWFzdGVyIERNQSBzdXBwb3J0IHByZXNlbnQKcGNpaWRlMDogcHJpbWFyeSBj
aGFubmVsIHdpcmVkIHRvIGNvbXBhdGliaWxpdHkgbW9kZQp3ZDAgYXQgcGNpaWRlMCBjaGFu
bmVsIDAgZHJpdmUgMDogPElCTS1EQkNBLTIwNjQ4MD4Kd2QwOiBkcml2ZSBzdXBwb3J0cyAx
Ni1zZWN0b3IgUElPIHRyYW5zZmVycywgTEJBIGFkZHJlc3NpbmcKd2QwOiA2MTk0IE1CLCAx
MzQyNCBjeWwsIDE1IGhlYWQsIDYzIHNlYywgNTEyIGJ5dGVzL3NlY3QgeCAxMjY4NTY4MCBz
ZWN0b3JzCndkMDogMzItYml0IGRhdGEgcG9ydAp3ZDA6IGRyaXZlIHN1cHBvcnRzIFBJTyBt
b2RlIDQsIERNQSBtb2RlIDIsIFVsdHJhLURNQSBtb2RlIDEKcGNpaWRlMDogcHJpbWFyeSBj
aGFubmVsIGludGVycnVwdGluZyBhdCBpcnEgMTQKd2QwKHBjaWlkZTA6MDowKTogdXNpbmcg
UElPIG1vZGUgNCwgVWx0cmEtRE1BIG1vZGUgMSAodXNpbmcgRE1BIGRhdGEgdHJhbnNmZXJz
KQpwY2lpZGUwOiBzZWNvbmRhcnkgY2hhbm5lbCB3aXJlZCB0byBjb21wYXRpYmlsaXR5IG1v
ZGUKcGNpaWRlMDogZGlzYWJsaW5nIHNlY29uZGFyeSBjaGFubmVsIChubyBkcml2ZXMpCnVo
Y2kwIGF0IHBjaTAgZGV2IDcgZnVuY3Rpb24gMjogSW50ZWwgODIzNzFBQiBVU0IgSG9zdCBD
b250cm9sbGVyIChQSUlYNCkgKHJldi4gMHgwMSkKdWhjaTA6IGludGVycnVwdGluZyBhdCBp
cnEgMTEKdXNiMCBhdCB1aGNpMDogVVNCIHJldmlzaW9uIDEuMAp1aHViMCBhdCB1c2IwCnVo
dWIwOiBJbnRlbCBVSENJIHJvb3QgaHViLCBjbGFzcyA5LzAsIHJldiAxLjAwLzEuMDAsIGFk
ZHIgMQp1aHViMDogMiBwb3J0cyB3aXRoIDIgcmVtb3ZhYmxlLCBzZWxmIHBvd2VyZWQKSW50
ZWwgODIzNzFBQiBQb3dlciBNYW5hZ2VtZW50IENvbnRyb2xsZXIgKFBJSVg0KSAobWlzY2Vs
bGFuZW91cyBicmlkZ2UsIHJldmlzaW9uIDB4MDIpIGF0IHBjaTAgZGV2IDcgZnVuY3Rpb24g
MyBub3QgY29uZmlndXJlZAplc20wIGF0IHBjaTAgZGV2IDggZnVuY3Rpb24gMDogRVNTIFRl
Y2hub2xvZ3kgSW5jIE1hZXN0cm8gMkUgUENJIEF1ZGlvIEFjY2VsZXJhdG9yIChyZXYuIDB4
MTApCmVzbTA6IGludGVycnVwdGluZyBhdCBpcnEgMTEKZXNtMDogU2lnbWFUZWwgU1RBQzk3
MjEvMjMgY29kZWM7IDE4IGJpdCBEQUMsIDE4IGJpdCBBREMsIFNpZ21hVGVsIDNECmF1ZGlv
MCBhdCBlc20wOiBmdWxsIGR1cGxleCwgbW1hcCwgaW5kZXBlbmRlbnQKZnhwMCBhdCBwY2kw
IGRldiA5IGZ1bmN0aW9uIDA6IGk4MjU1OVMgRXRoZXJuZXQsIHJldiA5CmZ4cDA6IGludGVy
cnVwdGluZyBhdCBpcnEgMTEKZnhwMDogRXRoZXJuZXQgYWRkcmVzcyAwMDpkMDo1OTowNTow
NjoyZAppbnBoeTAgYXQgZnhwMCBwaHkgMTogaTgyNTU1IDEwLzEwMCBtZWRpYSBpbnRlcmZh
Y2UsIHJldi4gNAppbnBoeTA6IDEwYmFzZVQsIDEwYmFzZVQtRkRYLCAxMDBiYXNlVFgsIDEw
MGJhc2VUWC1GRFgsIGF1dG8KTHVjZW50IFRlY2hub2xvZ2llcyBMVE1PREVNIChzZXJpYWwg
Y29tbXVuaWNhdGlvbnMpIGF0IHBjaTAgZGV2IDkgZnVuY3Rpb24gMSBub3QgY29uZmlndXJl
ZApjYmIwOiBpbnRlcnJ1cHRpbmcgYXQgaXJxIDExCmNhcmRzbG90MCBhdCBjYmIwIHNsb3Qg
MCBmbGFncyAwCmNhcmRidXMwIGF0IGNhcmRzbG90MDogYnVzIDEgZGV2aWNlIDAKcGNtY2lh
MCBhdCBjYXJkc2xvdDAKaXNhMCBhdCBwY2liMApjb20wIGF0IGlzYTAgcG9ydCAweDNmOC0w
eDNmZiBpcnEgNDogbnMxNjU1MGEsIHdvcmtpbmcgZmlmbwpwY2tiYzAgYXQgaXNhMCBwb3J0
IDB4NjAtMHg2NApwY2tiZDAgYXQgcGNrYmMwIChrYmQgc2xvdCkKcGNrYmMwOiB1c2luZyBp
cnEgMSBmb3Iga2JkIHNsb3QKd3NrYmQwIGF0IHBja2JkMDogY29uc29sZSBrZXlib2FyZCwg
dXNpbmcgd3NkaXNwbGF5MApwbXMwIGF0IHBja2JjMCAoYXV4IHNsb3QpCnBja2JjMDogdXNp
bmcgaXJxIDEyIGZvciBhdXggc2xvdAp3c21vdXNlMCBhdCBwbXMwIG11eCAwCmxwdDAgYXQg
aXNhMCBwb3J0IDB4Mzc4LTB4MzdiIGlycSA3CnBjcHBpMCBhdCBpc2EwIHBvcnQgMHg2MQpt
aWRpMCBhdCBwY3BwaTA6IFBDIHNwZWFrZXIKc3lzYmVlcDAgYXQgcGNwcGkwCmlzYXBucDAg
YXQgaXNhMCBwb3J0IDB4Mjc5OiBJU0EgUGx1ZyAnbiBQbGF5IGRldmljZSBzdXBwb3J0Cm5w
eDAgYXQgaXNhMCBwb3J0IDB4ZjAtMHhmZjogdXNpbmcgZXhjZXB0aW9uIDE2CmZkYzAgYXQg
aXNhMCBwb3J0IDB4M2YwLTB4M2Y3IGlycSA2IGRycSAyCmlzYXBucDA6IG5vIElTQSBQbHVn
ICduIFBsYXkgZGV2aWNlcyBmb3VuZApLZXJuZWxpemVkIFJBSURmcmFtZSBhY3RpdmF0ZWQK
Ym9vdCBkZXZpY2U6IHdkMApyb290IG9uIHdkMGEgZHVtcHMgb24gd2QwYgpyb290IGZpbGUg
c3lzdGVtIHR5cGU6IGZmcwp3c2Rpc3BsYXkwOiBzY3JlZW4gMSBhZGRlZCAoODB4MjUsIHZ0
MTAwIGVtdWxhdGlvbikKd3NkaXNwbGF5MDogc2NyZWVuIDIgYWRkZWQgKDgweDI1LCB2dDEw
MCBlbXVsYXRpb24pCndzZGlzcGxheTA6IHNjcmVlbiAzIGFkZGVkICg4MHgyNSwgdnQxMDAg
ZW11bGF0aW9uKQp3c2Rpc3BsYXkwOiBzY3JlZW4gNCBhZGRlZCAoODB4MjUsIHZ0MTAwIGVt
dWxhdGlvbikK

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