Around the beginning of Feb there was a little thread about my problems getting
Variable Rate Audio working with the i82801BA chipset.

I got as far as noting that when the VRA enable bit was set it didn't seem to 
stay set and so whatever sample rate you later requested the register was 
forced to 48kHz.

With the recent work on auich I took another look at this and it was still 
happening with sources as of yesterday.  On further probing it seems that the 
problem is that writes to the ac97 registers don't work until the codec is 
ready and its not ready when we try to do this immediately after a reset.

Adding the following little delay loop to auich_reset_codec() fixes that 
problem:

Index: auich.c
===================================================================
RCS file: /src/cvs/netbsd/syssrc/sys/dev/pci/auich.c,v
retrieving revision 1.14
diff -u -r1.14 auich.c
--- auich.c	2002/03/15 07:16:10	1.14
+++ auich.c	2002/03/17 13:00:09
@@ -469,10 +476,15 @@
 auich_reset_codec(void *v)
 {
 	struct auich_softc *sc = v;
+	int i;
 
 	bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, 0);
 	DELAY(10);
 	bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, ICH_CRESET);
+
+	for (i = 500000; i-- &&
+	       !(bus_space_read_4(sc->iot, sc->aud_ioh, ICH_GSTS) & ICH_PCR);
+	     DELAY(1));
 }
 
 int


with the above in, setting the VRA bit in the AC97_REG_EXTENDED_STATUS register 
does now work and subsequent setting of the AC97_REG_PCM_FRONT_DAC_RATE register
and reading it back does report the rate requested rather than 48kHz

_However_ (you knew that was coming didn't you)  when I play a 44.1kHz MP3 
(with noatun, or xmms, or mpg123 or via nasd) or a 22.05kHz mono file it still 
plays fast.

Knowing practically nothing about audio hardware I get lost in the discussion 
of SLOTREQ bits et al in the Intel 82801BA Datasheet so I'm at a loss to guess 
what else still needs to be done.

Suggestions?

cheers
mark