Subject: Re: A7V133 IDE controller
To: Frank van der Linden <fvdl@wasabisystems.com>
From: Manuel Bouyer <bouyer@antioche.lip6.fr>
List: port-i386
Date: 05/04/2001 20:41:10
On Fri, May 04, 2001 at 07:33:15PM +0200, Frank van der Linden wrote:
> On Fri, May 04, 2001 at 06:19:29PM +0200, Manuel Bouyer wrote:
> > Do you have more details on this ? Especially which revs of the controller
> > cause problems ?
> > This can be worked around in driver.
> 
> There have been spurious reports about lockups with the VIA chipset for
> quite some time (with tv cards, for example), but recently some
> Germans reproduced it consistently by using 2 drives on 2 channels
> simultaneously with the 686B (which is rev. 0x40 for pcib).

Ha OK, I just read this paper.

> 
> I forgot the url to this. I saw part of one proposed workaround,
> but it seemed to use registers that weren't even on the datasheet.
> 
> I think it's a more general chipset issue, not something that you
> can work around in just the pciide driver. Though I suppose using
> some safer defaults won't hurt.

If I understood it, the workaround is to be implemented in the pchb
driver, rigth ?

--
Manuel Bouyer <bouyer@antioche.eu.org>
--