Does anyone know of a way to force a Cyrix Cx486DX2 to use its
internal cache in write through mode rather than write back?

Even crash and burn testing would go faster if I could re-enable
the internal cache. :-)

Oh -- I've looked without success on the Cyrix web site. I did
find code that recognised the CPU but nothing low level enough
to say what bit to tweak in what register, supposing this is
even possible.

Regards,

Giles