HARAWAT.IN.ORACLE.COM drunkenly mumbled...
> 
> 	Does  netbsd's code uses the on chip caches ( 2 8kb caches)  of the 
> pentium chips. 

unless i'm totally off base (which i don't *think* i am, but i've only been 
here at work for 15 minutes and today sucks already) the onboard (also known
as L1 cache) cache is not controllable unlike L2 cache which can be enabled
or disabled at the will of the operator or OS.  the L1 cache is taken care
of at a chip level, by the CPU and we have no control over if we get to use
it or not, it is used no matter what.

i hope that made sense, i didn't get any sleep last night.

-brian

-- 
"Yes, evil comes in many forms, whether it be a man-eating cow or
 Joseph Stalin, but you can't let the package hide the pudding!  Evil
 is just plain bad!  You don't cotton to it.  You gotta smack it in the
 nose with the rolled-up newspaper of goodness!  Bad dog!  Bad dog!"
                                --The Tick