Subject: Re: separate statclock(9) with mips3 CP0 timer interrupt
To: None <firstname.lastname@example.org>
From: Izumi Tsutsui <email@example.com>
Date: 04/22/2006 16:23:47
In article <4449D2AF.firstname.lastname@example.org>
> Out of curiosity, why not use CPU INT5 (CP0 clock interrupt) for
Not sure, but I guess:
- native OSes (Ultrix, WindowsNT etc.) don't use it
- MIPS1 CPUs don't have it (but have common external timers?)
- external timers could be more flexible then internal one
- no certain way to get precise CPU clock frequency on all models
(but external timer clock is CPU indepenedent?)
> I never even knew there was support for a separate statistics clock.
It is mentioned in the D&I of 4.4BSD section 3.4,
but I don't know it's still useful for modern systems.
(the example in the book is hp300)