kiyohara@kk.iij4u.or.jp wrote:

> I guess that the version of GT is old perhaps.  ;-<

According to Linux-MIPS source:
http://www.linux-mips.org/cvsweb/linux/arch/mips/pci/fixup-cobalt.c?rev=1.11
it always set timeout and retry values to maximum.
How about the attached patch? I've also put compiled -current kernel:
http://www.ceres.dti.ne.jp/~tsutsui/netbsd/netbsd-cobalt-GENERIC-gtfix-20050614.gz

But does the problem really depend on GT version?
I doubt that "the STOP line disconnected from Galileo to VIA on PCI"
is GT revision specific, but I guess it Cobalt model specific.

I've been thinking that we should have some variable which
indicates cobalt models (like "cobalt_board_id" on Linux)
and it could be fetched from VT82C586 register space,
but I have not tried to implement it yet.
(I wonder how we can implement the proper style to read PCI
 configuration space before GT is attached)

Please refer arch/mips/cobalt/setup.c:cobalt_setup() for details:
http://www.linux-mips.org/cvsweb/linux/arch/mips/cobalt/setup.c?rev=1.24
---
Izumi Tsutsui


Index: dev/gt.c
===================================================================
RCS file: /cvsroot/src/sys/arch/cobalt/dev/gt.c,v
retrieving revision 1.13
diff -u -r1.13 gt.c
--- dev/gt.c	25 Mar 2005 15:01:57 -0000	1.13
+++ dev/gt.c	15 Jun 2005 15:33:14 -0000
@@ -118,6 +118,10 @@
 	    (bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_PCI_COMMAND) &
 	    ~PCI_SYNCMODE) | PCI_PCLK_HIGH);
 
+	(void)bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_PCI_TIMEOUTRETRY);
+	bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_PCI_TIMEOUTRETRY,
+	    0xff << PCI_RETRYCTR_SHIFT || 0xff << PCI_TIMEOUT1_SHIFT || 0xff);
+
 #if NPCI > 0
 	pc = &sc->sc_pc;
 	pc->pc_bst = sc->sc_bst;
Index: dev/gtreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/cobalt/dev/gtreg.h,v
retrieving revision 1.1
diff -u -r1.1 gtreg.h
--- dev/gtreg.h	28 Aug 2004 12:32:48 -0000	1.1
+++ dev/gtreg.h	15 Jun 2005 15:33:14 -0000
@@ -46,6 +46,13 @@
 #define  PCI_PCLK_HIGH		0x00000002
 #define  PCI_PCLK_SYNC		0x00000004
 
+#define GT_PCI_TIMEOUTRETRY	0xc08
+#define  PCI_TIMEOUT0		0x000000ff
+#define  PCI_TIMEOUT1		0x0000ff00
+#define  PCI_TIMEOUT1_SHIFT	8
+#define  PCI_RETRYCTR		0x00ff0000
+#define  PCI_RETRYCTR_SHIFT	16
+
 #define GT_INTR_CAUSE		0xc18
 #define  INTSUM			0x00000001
 #define  MEMOUT			0x00000002