Subject: Re: dmesg on PCI_CONFIG_DUMP
To: None <christopher.d.schultz@comcast.net>
From: KIYOHARA Takashi <kiyohara@kk.iij4u.or.jp>
List: port-cobalt
Date: 01/24/2004 05:40:20
Hi! Christopher


From: Christopher Schultz <christopher.d.schultz@comcast.net>
Date: Fri, 23 Jan 2004 14:39:02 -0500

> I have a Qube 2 (english) which is available for this type of thing. Let 
> me know that I need to do in order to configure my kernel appropriately, 
> and what components to plug-into it, and what patches I need, and I'll 
> happily give you dmesg dumps or anything else you need.

Very thanks.

Please add the following to your GENERIC.
after config, make depend, make.

-->
options         PCI_CONFIG_DUMP
<--



The following messages are displayed at the time of a reboot.

# Here will be seen supposing it is generous.
# It will be unusual operation if it is both on.
#      Parity error checking: off
#      System error (SERR): off

--
[ Kernel symbol table missing! ]
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

  .
  . snip
  .

pci0 at gt0
pci0: i/o space, memory space enabled, rd/line, wr/inv ok
pchb0 at pci0 dev 0 function 0: PCI configuration registers:
  Common header:
    0x00: 0x414611ab 0xa2800006 0x05800011 0x00002000

    Vendor Name: Galileo Technology (0x11ab)
    Device Name: GT-64011 System Controller (0x4146)
    Command register: 0x0006
      I/O space accesses: off
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0xa280
      Capability List support: off
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: on
      Asserted System Error (SERR): off
      Parity error detected: on
    Class Name: memory (0x05)
    Subclass Name: miscellaneous (0x80)
    Interface: 0x00
    Revision ID: 0x11
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x20
    Cache Line Size: 0x00

  Type 0 ("normal" device) header:
    0x10: 0x00000000 0x08000000 0x1c000000 0x1f000000
    0x20: 0x14000000 0x14000001 0x00000000 0x00000000
    0x30: 0x00000000 0x00000000 0x00000000 0x00000100pchb0 at pci0 dev 0 function 0: PCI configuration registers:
  Common header:
    0x00: 0x414611ab 0xa2800006 0x05800011 0x00002000

    Vendor Name: Galileo Technology (0x11ab)
    Device Name: GT-64011 System Controller (0x4146)
    Command register: 0x0006
      I/O space accesses: off
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0xa280
      Capability List support: off
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: on
      Asserted System Error (SERR): off
      Parity error detected: on
    Class Name: memory (0x05)
    Subclass Name: miscellaneous (0x80)
    Interface: 0x00
    Revision ID: 0x11
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x20
    Cache Line Size: 0x00

  Type 0 ("normal" device) header:
    0x10: 0x00000000 0x08000000 0x1c000000 0x1f000000
    0x20: 0x14000000 0x14000001 0x00000000 0x00000000
    0x30: 0x00000000 0x00000000 0x00000000 0x00000100
    Base address register at 0x10
      not implemented(?)
    Base address register at 0x14
      type: 32-bit nonprefetchable memory
      base: 0x08000000, size: 0x08000000
    Base address register at 0x18
      type: 32-bit nonprefetchable memory
      base: 0x1c000000, size: 0x02000000
    Base address register at 0x1c
      type: 32-bit nonprefetchable memory
      base: 0x1f000000, size: 0x01000000
    Base address register at 0x20
      type: 32-bit nonprefetchable memory
      base: 0x14000000, size: 0x00001000
    Base address register at 0x24
      type: 32-bit i/o
      base: 0x14000000, size: 0x00001000
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x0000
    Subsystem ID: 0x0000
    Expansion ROM Base Address: 0x00000000
    Reserved @ 0x34: 0x00000000
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x00

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

    Don't know how to pretty-print device-dependent header.

Galileo Technology GT-64011 System Controller (miscellaneous memory, revision 0x
11) at ? dev 0 function 0 (intrswiz 0, intrpin 0x1, i/o off, mem on, no quirks):
 Galileo GT-64111 System Controller, rev 1
tlp0 at pci0 dev 7 function 0: PCI configuration registers:

  .
  .
  .
 snip

--
kiyohara