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could you please test if the attached patch makes the kernel _correctly_
identify the cobalt hardware it is running on ?
gt.c is located in arch/cobalt/dev

thanks!


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--- gt.c.orig	Fri Oct 12 17:32:37 2001
+++ gt.c	Fri Oct 12 19:34:00 2001
@@ -42,8 +42,10 @@
 
 #include <machine/intr.h>
 #include <machine/bus.h>
+#include <machine/nvram.h>
 
 #include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
 #include "pci.h"
 
 struct gt_softc {
@@ -54,6 +56,8 @@
 static void	gt_attach(struct device *, struct device *, void *);
 static int	gt_print(void *aux, const char *pnp);
 
+u_int8_t	cobalt_board_id;
+
 struct cfattach gt_ca = {
 	sizeof(struct gt_softc), gt_match, gt_attach
 };
@@ -75,19 +79,59 @@
 {
 	struct pcibus_attach_args pba;
 
+#if NPCI > 0
+	int dev;
+#endif
+
 	printf("\n");
 
-	/* XXX */
-	*((volatile u_int32_t *)0xb4000c00) =
-		(*((volatile u_int32_t *)0xb4000c00) & ~0x6) | 0x2;
+	/*
+	 * set galileo pci syncmode to pclk frequency >= (tclk frequency / 2)
+	 *
+	 * XXX according to the Galileo GT-64111 datasheet this is for "higher
+	 *     performance". is it really a good idea to do this ?
+	 */
+	*((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000c00)) =
+		(*((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000c00)) &
+		~0x6) | 0x2;
 
 #if NPCI > 0
 	pba.pba_busname = "pci";
 	pba.pba_dmat = &pci_bus_dma_tag;
-	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
 	pba.pba_bus = 0;
 	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
 		PCI_FLAGS_MRL_OKAY | /*PCI_FLAGS_MRM_OKAY|*/ PCI_FLAGS_MWI_OKAY;
+
+	/*
+	 * identify cobalt board id (Qube/RaQ 1 vs. 2)
+	 * 
+	 * the id is hardwired into the external SMI pins 4-7 of the VIA
+	 * VT82C586A and can be read through the pci-to-isa bridge registers.
+	 * this could be much nicer done in the attach routine of the pcib,
+	 * hence that would be too late for pci quirk workarounds based on the
+	 * board id.
+	 */
+	cobalt_board_id = 0;
+
+	for (dev = 0; dev < pci_bus_maxdevs(pba.pba_pc, pba.pba_bus); dev++) {
+		pcitag_t tag;
+		pcireg_t id;
+
+		tag = pci_make_tag(pba.pba_pc, pba.pba_bus, dev, 0);
+		id = pci_conf_read(pba.pba_pc, tag, PCI_ID_REG);
+
+		if (PCI_VENDOR(id) == PCI_VENDOR_INVALID ||
+		    PCI_VENDOR(id) == 0 ||
+		    (PCI_VENDOR(id) != PCI_VENDOR_VIATECH &&
+		    PCI_PRODUCT(id) != PCI_PRODUCT_VIATECH_VT82C586_ISA))
+			continue;
+
+		cobalt_board_id = ((pci_conf_read(pba.pba_pc, tag, VIA_BOARD) >>
+			BOARD_SHIFT)) & ~BOARD_MASK;
+
+		break; /* once the pcib is found we can stop */
+	}
+
 	config_found(self, &pba, gt_print);
 #endif
 	return;
@@ -98,6 +142,32 @@
 	void *aux;
 	const char *pnp;
 {
-	/* XXX */
-	return 0;
+	char tmp[32];
+
+	if (pnp != 0)
+		return (QUIET);
+
+	sprintf(tmp, "on %s ", cpu_model);
+
+	switch(cobalt_board_id) {
+		case BOARD_QUBE1:
+		    strcat(tmp, "Qube 1");
+		    break;
+		case BOARD_RAQ1:
+		    strcat(tmp, "RaQ 1");
+		    break;
+		case BOARD_QUBE2:
+		    strcat(tmp, "Qube 2");
+		    break;
+		case BOARD_RAQ2:
+		    strcat(tmp, "RaQ 2");
+		    break;
+		default:
+		    strcat(tmp, "<unknown>");
+		    break;
+	}
+
+	printf(" %s board (id 0x%x)", tmp, cobalt_board_id);
+			
+	return (UNCONF);
 }

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