Ben Harris <bjh21@netbsd.org> writes:

[...]

> > It doesn't give me a handy keyword. For data abt, ldr and str can
> > apparently write back modified base registers, and ldm and stm insns
> > can abort sort of halfway through. I guess this is the ARM6 early abt
> > model?
> 
> Writing back modified base registers for LDR and STR is the "Base
> Updated Abort Model", ie late aborts. 

So I want the arm7 fixups like I originally tried?

> FWIW, I've just committed changes to make the meanings of the fixup
> functions a little clearer.  There's some more optimisation to be
> done there, in that early aborts are a subset of late aborts, so
> they can share a lot of code.
> 
> > Bad news is that the port blows up eventually on an abort (with
> > ARM 7 fixups enabled) after (hopefully) jumping into main. It
> > certainly gets to the very end of initarm, but then does nothing
> > for several minutes. 

OK, so now I'm cheating and jumping into main directly from initarm
;-)

I get the copyright printed fine, then (this time 100% reproduceable)
I get

        panic: uvm_km_suballoc: unable to allocate space in parent map

which I don't understand at all. It shouldn't be running out of memory
and other pmap things have worked.

[...]

> What was the instruction?  The things that can't be fixed up seem to
> be:

Hehe, it was a mov iirc - that boot was *seriously* wierd. Not a clue
how it got where it did. :-(

[...]

> That's not good.  It'll screw up other users of disassem() (like
> DDB).  The abort-fixup code should be printing the address itself.

Agreed.

> I'll look at making it do this.

Cool! But please don't touch cpufunc.c for a moment - I have no CVS
write access and pending changes to it :-(

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