Ben Harris <bjh21@netbsd.org> writes:
> >OK I've written them (from the 710 T docs). I do hope that the abort
> >fixups are no different, because I am disinclined to try to audit
> >those ;-)
> 
> You'll either need no fixups (base restored model), the same as ARM7 (late
> (base updated model / late aborts) or the same as ARM6 (early aborts). 
> Check your data sheet.

It doesn't give me a handy keyword. For data abt, ldr and str can
apparently write back modified base registers, and ldm and stm insns
can abort sort of halfway through. I guess this is the ARM6 early abt
model?

Bad news is that the port blows up eventually on an abort (with ARM 7
fixups enabled) after (hopefully) jumping into main. It certainly gets
to the very end of initarm, but then does nothing for several
minutes. I don't know why it doesn't print the copyright . . . but
once the world's most annoying panic came up - it disassembled an
insn, didn't tell me where it was, then finished off a panicstr
warning about being unable to fix things up with a \n.

Suggested patch:

Index: disassem.c
===================================================================
RCS file: /pub/NetBSD-CVS/syssrc/sys/arch/arm/arm/disassem.c,v
retrieving revision 1.11
diff -u -r1.11 disassem.c
--- disassem.c  2001/03/04 04:15:58     1.11
+++ disassem.c  2001/06/02 20:31:15
@@ -279,7 +279,7 @@
        matchp = 0;
        insn = di->di_readword(loc);

-/*     di->di_printf("loc=%08x insn=%08x : ", loc, insn);*/
+       di->di_printf("loc=%08x insn=%08x : ", loc, insn);

        while (i_ptr->name) {
                if ((insn & i_ptr->mask) ==  i_ptr->pattern) {
-- 

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