On Tue, 22 May 2001, Gavan Fantom wrote:

> On Tue, 22 May 2001, Ben Harris wrote:
>
> > In article <200105221438.PAA10008@cam-mail2.cambridge.arm.com> you write:
> > >> What is the effect of an instruction here?
> > >
> > >The processor can prefetch-abort when it shouldn't.
> >
> > The stack backtrace shows a data abort in hardclock(), so assuming it's
> > correct, that's probably not the problem here.
>
> Is there anything that I can test here to establish what is going wrong?
> I'm using my ARM710 to get the full sources and I plan on following the
> 1.5 branch with cvs for a while, so I should be able to test things just
> by putting the StrongARM back in for a while.

Well, I think you really need to work out where the fault is actually
happening.  I can't remember enough about the state of arm32 DDB (or even
arm26 DDB for that matter) to tell you how to do this, though.

-- 
Ben Harris                                                   <bjh21@netbsd.org>
Portmaster, NetBSD/arm26               <URL:http://www.netbsd.org/Ports/arm26/>