Subject: Re: StrongARM performance tweaks cpufunc_asm.S
To: Richard Earnshaw <rearnsha@buzzard.freeserve.co.uk>
From: Jason R Thorpe <thorpej@zembu.com>
List: port-arm32
Date: 03/08/2001 14:32:28
On Thu, Mar 08, 2001 at 10:27:15PM +0000, Richard Earnshaw wrote:
> It doesn't matter too much at the moment, since we don't cache the page
> tables, but I can find no reference in the TRM to the write buffer in
> relation to TLB walks. Given the above, my suspicion is that the TLB
> walking hardware won't snoop the write buffer either.
Indeed -- have you measured how much faster the system is if you
enable cacheing the page tables, and do the appropriate wb-drain
and cache-cleans before TLB invalidations?
--
-- Jason R. Thorpe <thorpej@zembu.com>