Subject: Re: StrongARM performance tweaks cpufunc_asm.S
To: Richard Earnshaw <rearnsha@buzzard.freeserve.co.uk>
From: Neil A. Carson <neil@causality.com>
List: port-arm32
Date: 03/07/2001 19:01:38
Richard Earnshaw wrote:

> Finally the correctness fix is to add some calls to drain the write
buffers
> -- these are particularly important when we are trying to
synchronize I$
> and D$.

This is just from my poor old memory, and it comes with a 100%
could-well-be-bollocks but:

I think I recall ripping these out. The write buffer is a physically
tagged object next to memory, so it only needs to be flushed when
synchronising main memory for DMA, *not* when cache
flushing/synchronising. Please check this...

Also I think there was a reason why the author used two hunks of RAM
to
flush the cache but I can't remember what it was; it seemed the
popular
thing at the time.

As I said, this could be 100% nonsense.

        N.