Subject: Re: tf_pc value
To: Chris Gilbert <chris@paradox.demon.co.uk>
From: Richard Earnshaw <rearnsha@arm.com>
List: port-arm32
Date: 03/06/2001 10:38:16
> > Oh, and this code (in syscall.c) is just plain wrong on ARMv5:
> >
> >     if ((ReadWord(frame->tf_pc - INSN_SIZE) & 0x0f000000) != 0x0f000000) {
> >
> > There are valid instructions in the NV space now (though at this time, I
> > don't think any of them can fault).
> 
> That code is only of relevance to broken arm7's, and if arm have put us in 
> the awkward situation of having instr's in the NV space, then something was 
> bound to give when trying to support all their processors (broken or not).

Oops, forget I mentioned this.  I misread the code as checking the 
condition field for NV (it doesn't).

However, ARMv5 does mandate that all use of NV takes the undefined 
instruction trap, except where new instructions have been defined for that 
space.

BTW, the old NV condition code took up 1/16th of the entire opcode space 
on the ARM; it represents probably the largest chunk of unallocated 
instructions in the ARM instruction space.  It was obsoleted in ARMv3 and 
so it now makes good sense to use it for extending the architecture; so I 
would expect to see more and more instructions added in this area.

NB. the code in question could be made safer by adding a check for the cpu 
class (which could be set up during boot).

R.