Subject: Re: Footbridge/PCI initialization?
To: None <bruno@achauer.de>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: port-arm32
Date: 09/17/2000 13:07:58
> Ok, I'll try options PCIVERBOSE with 82559 on my CATS.

Here is the kernel message with "options PCI_CONFIG_DUMP":
(BTW, I think default MSGBUFSIZE is too small for CATS...)

---
fxp0 at pci0 dev 10 function 0: PCI configuration registers:
  Common header:
    0x00: 0x12298086 0x02900007 0x02000008 0x00002008

    Vendor Name: Intel (0x8086)
    Device Name: 82557 Fast Ethernet LAN Controller (0x1229)
    Command register: 0x0007
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0x0290
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: network (0x02)
    Subclass Name: ethernet (0x00)
    Interface: 0x00
    Revision ID: 0x08
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x20
    Cache Line Size: 0x08

  Type 0 ("normal" device) header:
    0x10: 0x08030000 0x0000efc1 0x08100000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x000c8086
    0x30: 0x08200000 0x000000dc 0x00000000 0x38080103

    Base address register at 0x10
      type: 32-bit nonprefetchable memory
      base: 0x08030000, size: 0x00001000
    Base address register at 0x14
      type: i/o
      base: 0x0000efc0, size: 0x00000040
    Base address register at 0x18
      type: 32-bit nonprefetchable memory
      base: 0x08100000, size: 0x00100000
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x8086
    Subsystem ID: 0x000c
    Expansion ROM Base Address: 0x08200000
    Capability list pointer: 0xdc
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x38
    Minimum Grant: 0x08
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x03
    Capability register at 0xdc
      type: 0x01 (Power Management, rev. 1.0)

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x7e220001
    0xe0: 0x3a004000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

    Don't know how to pretty-print device-dependent header.

Intel 82557 Fast Ethernet LAN Controller (ethernet network, revision 0x08) at ? dev 10 function 0 (tag 0x5000, intrtag 0x5000, intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks): Intel i82557 Ethernet, rev 8
fxp0: interrupting at irq 9
fxp0: Ethernet address 00:d0:b7:68:11:d3, 10/100 Mb/s

---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp