Subject: Re: Footbridge/PCI initialization?
To: None <bruno@achauer.de>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: port-arm32
Date: 09/17/2000 03:19:14
In <200009161649.SAA20863@dilbert.achauer.de>
bruno@achauer.de wrote:

> I'm working on port of NetBSD/arm32 (1.5_ALPHA2) to a Footbridge-based
> singe-board computer.  Most of it is up and running, but I can't get
> Ethernet (Intel 82559ER attached to Footbridge PCI) working; apparently,
> the firmware initializes the Footbridge and/or the PCI bus either
> incompletely, incorrectly or in a way NetBSD can't handle :-(

I'm using i82559 on my CATS. I cannot show configurations right now,
but there are some related comments in /sys/dev/pci/if_fxp_pci.c:

	/*
	 * Version 2.1 of the PCI spec, page 196, "Address Maps":
	 *
	 *	Prefetchable
	 *
	 *	Set to one if there are no side effects on reads, the
	 *	device returns all bytes regardless of the byte enables,
	 *	and host bridges can merge processor writes into this
	 *	range without causing errors.  Bit must be set to zero
	 *	otherwise.
	 *
	 * The 82557 incorrectly sets the "prefetchable" bit, resulting
	 * in errors on systems which will do merged reads and writes.
	 * These errors manifest themselves as all-bits-set when reading
	 * from the EEPROM or other < 4 byte registers.
	 *
	 * We must work around this problem by always forcing the mapping
	 * for memory space to be uncacheable.  On systems which cannot
	 * create an uncacheable mapping (because the firmware mapped it
	 * into only cacheable/prefetchable space due to the "prefetchable"
	 * bit), we can fall back onto i/o mapped access.
	 */

fxp_pci_attach() calls bus_space_map() to clear BUS_SPACE_MAP_PREFETCHABLE,
but footbredge_mem_bs_map() does not handle such flags at all.
(It should make the PCI space uncachable?)
Anyway, I guess fxp_pci with i/o mapped access would work.
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp