On Sun, 25 Jun 2000, Neil A. Carson wrote:

> Probably the thing that could win you most is accelerating cache
> flushing. AFAIR the RiscPC does not have a "fast area," so one possible
> solution was that it reads a hunk of kernel text to do the job (amb? I
> really don't remember any more...). With the kernel being loaded low in
> memory, if this is the case then you've pretty much lost.
Yep on the Riscpc the cache flush areas will be in low memory. Other
machines that have fast cache clean areas adjust this.
Pretty much all you need to do to move it is map some memory from a faster
block into kernel VA space (uvm_km_valloc) and then modify
sa110_cache_clean_addr to point to it and sa110_cache_clean_size to the
correct size. Take a look at footbridge/footbridge_machdep.c for examples
(note this used to use uvm_km_valloc() but now the memory is premapped
during boot).

Cheers,
				Mark