Hi,

this isn't really a NetBSD problem, but I am running NetBSD/arm32 1.4.1
on a EBSA285 so I thought maybe someone has encountered this here.

When I try to set up a DMA transfer from a (in-house developed) PCI card
to SDRAM using the 21285 as master, strange things happen.

The first transfer goes OK, as seen on a PCI analyzer, but the DMA
channel control register ends up in a inconsistent state afterwards:

bit 0: Channel enable
bit 2: Channel transfer done
bit 4: Channel initial desc. in reg.
bit 7: Channel chain done
...

According to the datasheet (also checked sept -99 errata), bit 0 should
be cleared when bit 7 (chain done) is set. The error bit is not set. The
byte count in the DMA channel byte count register is set to the initial
value, not zero, after the first transfer. The datasheets states that it
should be updated internally.

Needless to say, the following transfers fail miserably. The registers
are mapped to volatile-declared pointers, and the assembly looks OK to
me.

Any thoughts?

/BR

--
Björn Roth, M.Sc                 bjorn.roth@softronic.se
Softronic Konsult AB             +46-(0)708-813146