On Tue, 30 Mar 1999, Richard Earnshaw wrote:

> Yes, this is in the correct ball-park.  I've just grep-ed some assembler 
> files I have lying around and ldm ...pc} makes up about 1.2% of the 
> instruction mix;  typically half of those will require a pad instruction 
> before-hand.  However, this still inserts far more padding than desirable, 
> since only one in 500 of those return instructions would have ended up on 
> a page boundary (1024 instructions per page and in this case we know that 
> half of them were already on an even alignment and won't need adjusting).

Some hard numbers are very useful. Thanks.
This should mean that just 1 in 40 000 pages will have the bug, 
and that just 2 in 1 600 000 000 consecutive pages will both have the bug.
While that may actually happen sometime, 3 times will probably never
happen for anyone. 

This is the reason I think that having the Virtual Memory Manager getting
the next page to avoid pagefaults, is the best method of living with the
StrongARM-K bug.

As for changing the processor:
Yes, I will change my StrongARM-K, 
to 2 Intel Celerons. I expect much
higher stability, and 120 times speed improvement on my math code.

Kim0