> I am currently writing some integer math. It is somewhat like
> mpeg, DSP, 3D geometry, whatever. The code has this form:
> 	ldr	r3, [r6, #-1016]
> 	add	r4, r4, r3
> 	ldr	r3, [r6, #-1024]
> 	add	r4, r4, r3
> 	ldr	r3, [r6, #4]
> 	add	r4, r4, r3
> 	ldr	r3, [r6, #-2044]
> 	add	r4, r4, r3
> 	ldr	r3, [r6, #-2048]
> 	add	r4, r4, r3
> 
> It loads a value, (waits for it,) adds it, and so on.
> However, this is not the best way to do it on a StrongARM.
> Accessing memory takes time, and the StrongARM has a pipeline for this,
> meaning time can be saved by doing a different instruction while waiting
> for the memory. If the code is changed thus:
> 	ldr	r3, [r6, #-1016]
> 	ldr	r2, [r6, #-1024]
> 	add	r4, r4, r3
> 	ldr	r3, [r6, #4]
> 	add	r4, r4, r2
> 	ldr	r2, [r6, #-2044]
> 	add	r4, r4, r3
> 	ldr	r3, [r6, #-2048]
> 	add	r4, r4, r2
> 	add	r4, r4, r3
> 
> This uses 2 registers for memory accesses, and using the previous register
> when adding. This is a sort of double buffering which puts 2 instructions
> between a memoryaccess and its subsequent use.
> 
> Unfortunately GCC does not do this optimization, but perhaps one of the
> experts could make it do so? After all, other processors have similar
> things in GCC, such as delayed branching and multiply.

Yes it does, but you need egcs for this:
  gcc -O2 -mtune=strongarm

You need -O2 to turn on the scheduler pass, and -mtune=strongarm to tell 
it to tune the code for a strongarm.

Note, 'tuning' for a strongarm is not the same as 'compiling' for a 
strongarm, the latter (-mcpu=strongarm) tells the compiler it can use 
instructions that are not available on earlier arms, while tuning just 
causes it to use the normal instructions but in a way that will perform 
best on a strongarm (so your code will still run fine on an arm6).

2nd note, -mcpu=strongarm won't work on a Risc PC since the bus 
architecture won't support half-word instructions.

Richard.