> In message <199805040808.KAA15148@ra.pvv.ntnu.no.pvv>
>           kim@iq.pvv.ntnu.no (Kim G. S. OEyhus) wrote:
> 
> > It only concerns the LDM^ instruction, not the LDM instruction?
> > If so, don't use the LDM^ instruction, but instead LDM, and get
> > the CPSR by a separate instruction. (I am not entirely clear heare)
> 
> Ah yes, I wondered why you thought it would be easy to fix. The ^ (or S
> field) has two meanings, the one you're thinking of, or alternatively to
> force usage of the USR bank of registers. I'm sure you can see that the
> latter is non-trivial to achieve by alternative means.
> 
> I don't know much about 32-bit mode, but I strongly suspect the first
> meaning doesn't apply in this case, separate instructions being needed
> to transfer the PSR.

I am sitting here with the "Acorn Assembler" manual on my lap.

The flags have their own register, CPSR, which can be put away
into several SPSR registers for backup when the processor changes modus,
such as serving interrupt.

When LDM is changed into LDM^, the S bit in the instruction word is set.
In 32 bit mode, this means the following:
If LDM^ loads the PC, then the flags, CPSR, are loaded from the
current backup flag register, SPSR.

So, when restoring registers, such as returning from an
interrupt, where all registers are restored, including
the program counter, PC, all registers are fetched from
the current stack, except the flag register, CPSR, which is
fetched from a special memory inside the processor.

Where the LDM^ paging bugs fit into this scheme, I havent the
faintest notion about. 


Anyway, the book says that the S bit must not be set for instructions
that are to be executed in user mode. This makes the instruction only
necessary for parts of the kernel. If the kernel could be made without
putting LDM on page boundaries, the problem should be solved.

I think the whole point of this LDM^ behaviour, is to make it
possible to restore processor context in just 1 instruction,
so that the return from an interrupt will not be interrupted.

(Note, even though LDM^ is supposed to get the flags, SPSR,
 STM^ do NOT put away the flags, in 32 bit mode. The MRS/MSR
 instructions can be used to store the flags, so that LDM^
 can get them.)

Kim0