> >  int
> >  tas(slock_t *m)
> >  {
> >      slock_t res;
> >      __asm__("xchgb %0,%1":"=q" (res),"=m" (*m):"0" (0x1));
> >      return(res);
> >  }
> 
> Not surprise it gives problems as this is inline i386 assembly in GCC source
> code.
> I'll have to check exactly what this is doing and post an alternative (if
> someelse does not beat me to it.

tas looks to me like the TAS assembler instruction on MC68k. Test And Set.
It is an indivisable operation which can be used for semaphores in a 
multi-proces(sor) system. I think you can deal with this one using the SWP
instruction of the ARM instruction set. You'll have to lookup the meaning
of the syntax of the XCHGB instruction to see wat's really happening.

> >From the context (postgres95/src/backend/storage/ipc/s_lock.c)
> I would guess that this is in assembly so that the exchange of operands is not
> interrupts. The solution I would expect may just be a swap instruction.

-- 
------------------------------------------------------------------------------
Rogier Carper				email: Rogier.Carper@hio.hen.nl
Student of Computer Engineering
Institute of Information & Communication Technology
Enschede Polytechnic, The Netherlands