Subject: Re: Postgres95
To: Stefan Schlesinger <stscl@cscip.uni-sb.de>
From: Mark Brinicombe <amb@physig4.ph.kcl.ac.uk>
List: port-arm32
Date: 11/06/1996 23:13:15
Hi,
>  int
>  tas(slock_t *m)
>  {
>      slock_t res;
>      __asm__("xchgb %0,%1":"=q" (res),"=m" (*m):"0" (0x1));
>      return(res);
>  }

Not surprise it gives problems as this is inline i386 assembly in GCC source
code.
I'll have to check exactly what this is doing and post an alternative (if
someelse does not beat me to it.

What this should really have been was

  int
  tas(slock_t *m)
  {
      slock_t res;
#ifdef __i386
      __asm__("xchgb %0,%1":"=q" (res),"=m" (*m):"0" (0x1));
#else
#error This function needs fixing for this architecture
#endif
      return(res);
  }

to make it clear that work was required.

>From the context (postgres95/src/backend/storage/ipc/s_lock.c)
I would guess that this is in assembly so that the exchange of operands is not
interrupts. The solution I would expect may just be a swap instruction.

Cheers,
				Mark

-- 
Mark Brinicombe				amb@physig.ph.kcl.ac.uk
Research Associate			http://www.ph.kcl.ac.uk/~amb/
Department of Physics			tel: 0171 873 2894
King's College London			fax: 0171 873 2716