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Re: Raspberry Pi 4 support on 32 bit earmv7hf GENERIC kernel



On 25/03/2026 16:36, Izumi Tsutsui wrote:
Updated diffs:
  https://github.com/tsutsui/netbsd-src/compare/trunk...rpi4-earmv7hf-rev2

I wrote:
Perhaps the DTS need patching with

bcm2711.dtsi:           enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit

s/brcm,bcm2836-smp/brcm,bcm2711-smp/

I have no idea if we should patch DTS for maintainability.

Well there is a way to fix upstream DTS (it can and does have bugs) without
changing sys/external/gpl2/dts/dist

See sys/arch/arm/dts

Well, it's a bit hard to see how local changes should be applied,
but I'll check them later. (Any documentation?)

https://github.com/tsutsui/netbsd-src/commit/8af7f6d20a4490e1205a63684d6970790737dace

---
bcm2711: patch cpus "enable-method" in dts and use it on initialization

The upstream bcm2711.dtsi returns "brcm,bcm2836-smp" as "enable-method" on
/cpus node but bcm2711 requires different addresses from bcm2836.

Fixes early panic on Raspberry Pi 4B with MULITIPROCESSOR kernel:

---
[   1.0000000] NetBSD/evbarm (fdt) booting ...
[   1.0000000] [ Kernel symbol table missing! ]
[   1.0000000] Fatal kernel mode prefetch abort at 0x00000000
[   1.0000000] trapframe: 0x80b73ee8, spsr=600001d3
[   1.0000000] r0 =00000000, r1 =f4000000, r2 =0000009c, r3 =01000380
[   1.0000000] r4 =00000000, r5 =807a0484, r6 =00000001, r7 =80a4b180
[   1.0000000] r8 =807a0470, r9 =805baab8, r10=807a0484, r11=80b73f54
[   1.0000000] r12=7f000000, ssp=80b73f38, slr=80011170, pc =00000000

Stopped in pid 0.0 (system) at  0:      address 0x0 is invalid
adchis  r3, r7, r4, lsr #26
db{0}>
---

diff --git a/sys/arch/arm/broadcom/bcm283x_platform.c b/sys/arch/arm/broadcom/bcm283x_platform.c
index 8751d3af1236..7b553c6112ac 100644
--- a/sys/arch/arm/broadcom/bcm283x_platform.c
+++ b/sys/arch/arm/broadcom/bcm283x_platform.c
@@ -872,7 +872,26 @@ cpu_enable_bcm2836(int phandle)
return 0;
  }
+
+static int
+cpu_enable_bcm2711(int phandle)
+{
+	bus_space_tag_t iot = &bcm2711_bs_tag;
+	bus_space_handle_t ioh = BCM2711_ARM_LOCAL_VBASE;
+	uint64_t mpidr;
+
+	fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
+
+	const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0);
+
+	bus_space_write_4(iot, ioh, BCM2836_LOCAL_MAILBOX3_SETN(cpuno),
+	    KERN_VTOPHYS((vaddr_t)cpu_mpstart));
+
+	return 0;
+}
  ARM_CPU_METHOD(bcm2836, "brcm,bcm2836-smp", cpu_enable_bcm2836);
+/* patched in src/sys/arch/arm/dts/bcm2711-cpus.dtsi */
+ARM_CPU_METHOD(bcm2711, "brcm,bcm2711-smp", cpu_enable_bcm2711);
  #endif
#endif /* SOC_BCM2836 */
diff --git a/sys/arch/arm/dts/bcm2711-cpus.dtsi b/sys/arch/arm/dts/bcm2711-cpus.dtsi
new file mode 100644
index 000000000000..f55247eea2de
--- /dev/null
+++ b/sys/arch/arm/dts/bcm2711-cpus.dtsi
@@ -0,0 +1,10 @@
+/* $NetBSD$ */
+
+/*
+ * return "bcm2711-smp" instead of upstream default "bcm2836-smp"
+ * in bcm2711.dtsi to handle bcm2711 specific device addresses
+ */
+
+&cpus {
+	enable-method = "brcm,bcm2711-smp";
+};
diff --git a/sys/arch/arm/dts/bcm2711-rpi-4-b.dts b/sys/arch/arm/dts/bcm2711-rpi-4-b.dts
new file mode 100644
index 000000000000..842aafa15363
--- /dev/null
+++ b/sys/arch/arm/dts/bcm2711-rpi-4-b.dts
@@ -0,0 +1,5 @@
+/* $NetBSD$ */
+
+#include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts"
+
+#include "bcm2711-cpus.dtsi"
diff --git a/sys/arch/arm/dts/bcm2711-rpi-400.dts b/sys/arch/arm/dts/bcm2711-rpi-400.dts
new file mode 100644
index 000000000000..473d0ef9c967
--- /dev/null
+++ b/sys/arch/arm/dts/bcm2711-rpi-400.dts
@@ -0,0 +1,5 @@
+/* $NetBSD$ */
+
+#include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts"
+
+#include "bcm2711-cpus.dtsi"
diff --git a/sys/arch/arm/dts/bcm2711-rpi-cm4-io.dts b/sys/arch/arm/dts/bcm2711-rpi-cm4-io.dts
new file mode 100644
index 000000000000..ac5fd8f34321
--- /dev/null
+++ b/sys/arch/arm/dts/bcm2711-rpi-cm4-io.dts
@@ -0,0 +1,5 @@
+/* $NetBSD$ */
+
+#include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts"
+
+#include "bcm2711-cpus.dtsi"


LGTM



---

A custom "start4.elf" binary with patched strings from the original
"simple_bus" to "simple-bus" makes ofctl(8) return "simple-bus":

---
armv7# strings /boot/start4.elf.orig | grep simple
simple_bus
simple-framebuffer
simple_mode
simple_gpio_flash
simple
armv7# strings /boot/start4.elf | grep simple
simple-bus
simple-framebuffer
simple_mode
simple_gpio_flash
simple
armv7# ofctl -p /chosen name compatible
[Caching 258 nodes and 1436 properties]
name                    63686f73 656e00.. ........ ........   "chosen"
compatible              73696d70 6c652d62 757300.. ........   "simple-bus"
armv7#
---

(not sure how this should be handled)

No idea how this should be handled.

I'm lost on this one.

Why do you think "simple_bus" needs to be allowed?




Just use BUS_ADDR_{LO,HI}32

I see.
(Note several other drivers like sys/dev/ic/dwc_eqos.c also use
"(uint32_t)((uint64_t)paddr >> 32)" formats)

They're equally fugly and should use BUS_ADDR_{LO,HI}32

Sure, I'll fix them when I will be motivated.

https://github.com/tsutsui/netbsd-src/commit/50c26ba1ec7e2001752647e5ef3531d994668273

---
bcmgenet: fix build errors on ILP32 targets

Use BUS_ADDR_LO32() and BUS_ADDR_HI32() to handle 40 bit DMA addresses.
genet(4) on Raspberry Pi 4B just works even on earmv7hf kernels.

---

diff --git a/sys/dev/ic/bcmgenet.c b/sys/dev/ic/bcmgenet.c
index 36c0cbfe1358..4b911097d0f1 100644
--- a/sys/dev/ic/bcmgenet.c
+++ b/sys/dev/ic/bcmgenet.c
@@ -188,8 +188,8 @@ genet_setup_txdesc(struct genet_softc *sc, int index, int flags,
status = flags | __SHIFTIN(len, GENET_TX_DESC_STATUS_BUFLEN); - WR4(sc, GENET_TX_DESC_ADDRESS_LO(index), (uint32_t)paddr);
-	WR4(sc, GENET_TX_DESC_ADDRESS_HI(index), (uint32_t)(paddr >> 32));
+	WR4(sc, GENET_TX_DESC_ADDRESS_LO(index), BUS_ADDR_LO32(paddr));
+	WR4(sc, GENET_TX_DESC_ADDRESS_HI(index), BUS_ADDR_HI32(paddr));
  	WR4(sc, GENET_TX_DESC_STATUS(index), status);
  }
@@ -258,8 +258,8 @@ static void
  genet_setup_rxdesc(struct genet_softc *sc, int index,
      bus_addr_t paddr, bus_size_t len)
  {
-	WR4(sc, GENET_RX_DESC_ADDRESS_LO(index), (uint32_t)paddr);
-	WR4(sc, GENET_RX_DESC_ADDRESS_HI(index), (uint32_t)(paddr >> 32));
+	WR4(sc, GENET_RX_DESC_ADDRESS_LO(index), BUS_ADDR_LO32(paddr));
+	WR4(sc, GENET_RX_DESC_ADDRESS_HI(index), BUS_ADDR_HI32(paddr));
  }
static int



LGTM

Nick


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