Port-arm archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
Marvell kernel on Zyxel NSA310
I used build.sh to build a 10 release install image and kernel to try on
a Zyxel NSA310. I did get it to boot via USB and install on a local
drive and boot from there after some twists. I didn't keep too careful
log, but here's a few things from my notes:
./build.sh -U -u -j2 -O /mnt/ssd/obj -m evbarm -a earmv5 install-image
I think this would have wanted to package a GENERIC kernel, but didn't
build one. I just copied a sheeva tgz as generic tgz and that worked as
an easy hack. I'd be using a different kernel to boot anyway. There
might be a way to inject a custom kernel config, but I didn't find
instructions.
Console pinout: VCC TxD RxD [] GND
U-Boot 2017.07-tld-1 (Sep 05 2017 - 00:54:15 -0700)
ZyXEL NSA310 1-Bay Power Media Server
SoC: Kirkwood 88F6281_A1
DRAM: 256 MiB
WARNING: Caches not enabled
NAND: 128 MiB
In: serial
Out: serial
Err: serial
Net: egiga0
PHY reset timed out
MV88E1318 PHY initialized on egiga0
Hit any key to stop autoboot: 0
There wasn't many, if any, guides on the variables that NetBSD might
want from uboot, but I ended up with these my mixing some posts I found:
env set netbsd_add 0x800000
env set netbsd_boot 'bootm $netbsd_add $bootargs'
env set netbsd_bootcmd 'run netbsd_get ; run netbsd_set_args ; run netbsd_boot'
env set netbsd_rootdev /dev/dk1
env set netbsd_set_args 'setenv bootargs root=$netbsd_rootdev'
env set bootcmd run netbsd_bootcmd
env set netbsd_get 'ide reset; fatload ide 0 $netbsd_add $image_name'
env set image_name netbsd.ub
https://blog.netbsd.org/tnf/entry/running_netbsd_on_the_lg was a likely
source for the general idea.
And the system runs, but the ethernet port doesn't work. dmesg:
NetBSD 10.0 (XTLNSA) #1: Thu Aug 15 14:20:50 UTC 2024
total memory = 256 MB
avail memory = 245 MB
mainbus0 (root)
cpu0 at mainbus0 core 0: Sheeva 88SV131 rev 1 (ARM9E-S V5TE core)
cpu0: DC enabled IC enabled WB enabled LABT branch prediction enabled
cpu0: L1 16KB/32B 4-way (128 set) VIVT Instruction cache
cpu0: L1 16KB/32B 4-way (128 set) write-back-locking-C VIVT Data cache
mvsoc0 at mainbus0: Marvell 88F6281 Rev. A1 Kirkwood
mvsoc0: CPU Clock 1200.000 MHz SysClock 400.000 MHz TClock 200.000 MHz
mvsoctmr0 at mvsoc0 unit 0 offset 0x20300-0x203ff irq 65: Marvell SoC Timer
mvsocgpp0 at mvsoc0 unit 0 offset 0x10100-0x101ff irq 35: Marvell SoC General Purpose I/O Port Interface
mvsocgpp0: 50 gpio pins
mvsocgpp0: interrupts 96..103, intr 35
mvsocgpp0: interrupts 104..111, intr 36
mvsocgpp0: interrupts 112..119, intr 37
mvsocgpp0: interrupts 120..127, intr 38
mvsocgpp0: interrupts 128..135, intr 39
mvsocgpp0: interrupts 136..143, intr 40
mvsocgpp0: interrupts 144..151, intr 41
mvsocgpp0: Data Out: 0x00000000
mvsocgpp0: Data Out Enable Control: 0x00000000
mvsocgpp0: Data Blink Enable: 0x10000000
mvsocgpp0: Data In Polarity: 0x00000000
mvsocgpp0: Data In: 0x00000000
mvsocgpp0: Interrupt Cause: 0x00000000
mvsocgpp0: Interrupt Mask: 0x00000000
mvsocgpp0: Interrupt Level Mask: 0x00000000
mvsocgpp0: High Data Out: 0x00000000
mvsocgpp0: High Data Out Enable Ctrl: 0x00000000
mvsocgpp0: High Blink Enable: 0x00000000
mvsocgpp0: High Data In Polarity: 0x00000000
mvsocgpp0: High Data In: 0x00000008
mvsocgpp0: High Interrupt Cause: 0x00000000
mvsocgpp0: High Interrupt Mask: 0x00000000
mvsocgpp0: High Interrupt Level Mask: 0x00000000
gpio0 at mvsocgpp0: 50 pins
mvsocrtc at mvsoc0 unit 0 not configured
com0 at mvsoc0 unit 0 offset 0x12000-0x1201f irq 33: ns16550a, 16-byte FIFO
com0: console
com1 at mvsoc0 unit 1 offset 0x12100-0x1211f irq 34: ns16550a, 16-byte FIFO
ehci0 at mvsoc0 unit 0 offset 0x50000-0x50fff irq 19: Marvell USB 2.0 Interface
usb0 at ehci0: USB revision 2.0
gtidmac0 at mvsoc0 unit 0 offset 0x60000-0x60fff: Marvell IDMA Controller/XOR Engine
gtidmac0: XOR Engine 4 channels, intr 5, 6, 7, 8
gttwsi0 at mvsoc0 unit 0 offset 0x11000-0x110ff irq 29: Marvell TWSI controller
iic0 at gttwsi0: I2C bus
mvcesa0 at mvsoc0 unit 0 offset 0x3d000-0x3dfff irq 22: Marvell Cryptographic Engines and Security Accelerator
mvgbec0 at mvsoc0 unit 0 offset 0x70000-0x73fff: Marvell Gigabit Ethernet Controller
mvgbe0 at mvgbec0 port 0 irq 11
mvgbe0: Ethernet address 50:67:f0:69:87:70
mvgbe0: no PHY found!
mvgbec1 at mvsoc0 unit 1 offset 0x74000-0x77fff: Marvell Gigabit Ethernet Controller
mvgbe at mvgbec1 port 0 not configured
mvpex0 at mvsoc0 unit 0 offset 0x40000-0x41fff irq 9: Marvell PCI Express Interface
mvpex0: can't read pcicfg space
pci0 at mvpex0
Marvell 88F6281 SoC Kirkwood (miscellaneous memory, revision 0x03) at pci0 dev 0 function 0 not configured
mvpex0: can't read pcicfg space
mvsata0 at mvsoc0 unit 0 offset 0x80000-0x87fff irq 21: Marvell Serial-ATA Host Controller (SATAHC)
mvsata0: GenIIe, 1hc, 2port/hc
atabus0 at mvsata0 channel 0
atabus1 at mvsata0 channel 1
mvsdio at mvsoc0 unit 0 not configured
Notably that no PHY found message sticks out. I see
http://mail-index.netbsd.org/port-arm/2022/10/18/msg007891.html for
example has a PHY detected with the same pci message as does
https://www.netbsd.org/~martin/evbarm-atf/Y2023_10/dmesg.txt (obviously
different boards, but still).
I couldn't find anything very obvious to change or configure though I've
made some tries and compared the configs to a few other boards'.
I thought I'd post my journey so far in case someone finds similar
messages or problems or happens to have ideas.
Home |
Main Index |
Thread Index |
Old Index