[PATCH] Remaining Pandaboard ES changes

[Lwazi Dube <lwazeh%gmail.com@localhost>]

These attached diffs plus those in my previous messages should make
the Pandaboard ES Rev B1 work.

Index: sys/arch/arm/cortex/a9tmr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/cortex/a9tmr.c,v
retrieving revision 1.19
diff -u -p -r1.19 a9tmr.c
--- sys/arch/arm/cortex/a9tmr.c	22 Nov 2018 21:08:19 -0000	1.19
+++ sys/arch/arm/cortex/a9tmr.c	13 Jan 2019 00:08:10 -0000
@@ -334,9 +334,11 @@ a9tmr_intr(void *arg)
 	printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n", 
 	     __func__, cf, ci->ci_data.cpu_name, now, delta);
 #endif
+#if !defined(OMAP_4430)
 	KASSERTMSG(delta > sc->sc_autoinc / 64,
 	    "%s: interrupting too quickly (delta=%"PRIu64")",
 	    ci->ci_data.cpu_name, delta);
+#endif
 
 	ci->ci_lastintr = now;
 

Index: beagle_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/beagle/beagle_machdep.c,v
retrieving revision 1.76
diff -u -p -r1.76 beagle_machdep.c
--- beagle_machdep.c	18 Oct 2018 09:01:53 -0000	1.76
+++ beagle_machdep.c	13 Jan 2019 00:25:41 -0000
@@ -217,6 +217,7 @@ __KERNEL_RCSID(0, "$NetBSD: beagle_machd
 #include <dev/i2c/ddcreg.h>
 
 #include <dev/usb/ukbdvar.h>
+#include <net/if_ether.h>
 
 BootConfig bootconfig;		/* Boot config storage */
 static char bootargs[MAX_BOOT_STRING];
@@ -1080,8 +1081,10 @@ beagle_device_register(device_t self, vo
 #endif
 #if defined(OMAP_4430)
 		prop_dictionary_set_uint16(dict, "nports", 2);
-		prop_dictionary_set_bool(dict, "phy-reset", false);
-		prop_dictionary_set_cstring(dict, "port0-mode", "none");
+		prop_dictionary_set_bool(dict, "phy-reset", true);
+		prop_dictionary_set_bool(dict, "port0-extclk", true);
+		prop_dictionary_set_bool(dict, "port1-extclk", true);
+		prop_dictionary_set_cstring(dict, "port0-mode", "phy");
 		prop_dictionary_set_int16(dict, "port0-gpio", -1);
 		prop_dictionary_set_cstring(dict, "port1-mode", "phy");
 		prop_dictionary_set_int16(dict, "port1-gpio", 62);
@@ -1124,6 +1127,18 @@ beagle_device_register(device_t self, vo
 		return;
 	}
 
+	if (device_is_a(self, "usmsc")) {
+#if defined(OMAP_4430)
+		uint8_t enaddr[ETHER_ADDR_LEN];
+		if (get_bootconf_option(bootargs, "ethaddr",
+			BOOTOPT_TYPE_MACADDR, enaddr)) {
+			prop_data_t pd =
+			prop_data_create_data(enaddr, sizeof(enaddr));
+			prop_dictionary_set(dict, "mac-address", pd);
+		}
+#endif
+	}
+
 	if (device_is_a(self, "sdhc")) {
 #if defined(OMAP_3430) || defined(OMAP_3530)
 		prop_dictionary_set_uint32(dict, "clkmask", 0);

Index: obio_ohci.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/obio_ohci.c,v
retrieving revision 1.12
diff -u -p -r1.12 obio_ohci.c
--- obio_ohci.c	9 Apr 2018 16:21:09 -0000	1.12
+++ obio_ohci.c	13 Jan 2019 00:21:22 -0000
@@ -252,4 +252,19 @@ obioohci_clkinit(struct obio_attach_args
 
 	bus_space_unmap(obio->obio_iot, ioh, OMAP2_CM_SIZE);
 #endif
+#if defined(OMAP4)
+    bus_space_handle_t ioh;
+    uint32_t val;
+    int err;
+    bus_space_tag_t iot = obio->obio_iot;
+    bus_size_t off = OMAP4_CM_L3INIT_CORE;
+
+    err = bus_space_map(iot, OMAP2_CM_BASE + off, 0x100, 0, &ioh);
+    KASSERT(err == 0);
+    val = bus_space_read_4(iot, ioh, OMAP4_CM_L3INIT_USB_HOST_HS_CLKCTRL);
+    val |= OMAP4_CM_L3INIT_USB_HOST_HS_CLKCTRL_MODULEMODE_HW;
+    bus_space_write_4(iot, ioh, OMAP4_CM_L3INIT_USB_HOST_HS_CLKCTRL, val);
+
+    bus_space_unmap(iot, ioh, 0x100);
+#endif
 }
Index: omap3_ehci.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap3_ehci.c,v
retrieving revision 1.13
diff -u -p -r1.13 omap3_ehci.c
--- omap3_ehci.c	9 Apr 2018 16:21:09 -0000	1.13
+++ omap3_ehci.c	13 Jan 2019 00:21:22 -0000
@@ -676,6 +676,7 @@ omap4_usbhost_init(struct omap3_ehci_sof
 	KASSERT(err == 0);
 
 	val = bus_space_read_4(iot, ioh, OMAP4_CM_L3INIT_USB_HOST_HS_CLKCTRL);
+	val |= OMAP4_CM_L3INIT_USB_HOST_HS_CLKCTRL_MODULEMODE_HW;
 	if (sc->sc_portconfig[0].mode != OMAP3_EHCI_PORT_MODE_NONE) {
 		if (sc->sc_portconfig[0].extclk)
 			val |= OMAP4_CM_L3INIT_USB_HOST_HS_CLKCTRL_CLKSEL_UTMI_P1;
@@ -705,6 +706,7 @@ omap4_usbhost_init(struct omap3_ehci_sof
 	bus_space_write_4(iot, ioh, OMAP4_CM_L3INIT_USB_HOST_HS_CLKCTRL, val);
 
 	val = bus_space_read_4(iot, ioh, OMAP4_CM_L3INIT_USB_TLL_HS_CLKCTRL);
+	val |= OMAP4_CM_L3INIT_USB_TLL_HS_CLKCTRL_MODULEMODE_1;
 	if (sc->sc_portconfig[0].mode != OMAP3_EHCI_PORT_MODE_NONE)
 		val |= OMAP4_CM_L3INIT_USB_TLL_HS_CLKCTRL_USB_CH0_CLK;
 	if (sc->sc_nports > 1
Index: omap2_reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap2_reg.h,v
retrieving revision 1.34
diff -u -p -r1.34 omap2_reg.h
--- omap2_reg.h	4 Oct 2016 16:03:39 -0000	1.34
+++ omap2_reg.h	13 Jan 2019 00:21:22 -0000
@@ -431,6 +431,7 @@
 #define	 OMAP4_CM_L3INIT_USB_TLL_HS_CLKCTRL_USB_CH2_CLK		__BIT(10)
 #define	 OMAP4_CM_L3INIT_USB_TLL_HS_CLKCTRL_USB_CH1_CLK		__BIT(9)
 #define	 OMAP4_CM_L3INIT_USB_TLL_HS_CLKCTRL_USB_CH0_CLK		__BIT(8)
+#define	 OMAP4_CM_L3INIT_USB_TLL_HS_CLKCTRL_MODULEMODE_1	__BIT(0)
 #define	OMAP5_CM_L3INIT_SATA_CLKCTRL		0x0088
 #define	 OMAP5_CM_L3INIT_SATA_CLKCTRL_OPTFCLKEN_REF_CLK		__BIT(8)
 #define	 OMAP4_CM_L3INIT_SATA_CLKCTRL_MODULEMODE		__BITS(1,0)