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Pandaboard ES crash and proposed fix attached
My pandaboard ES has "never" successfully booted any images from
netbsd.org. It is working now but it takes several diffs to get there.
This email only deals with one of many problems. I have attached diffs
that fix the data abort seen in the dmesg below. I don't expect the
changes to go in as is. The code was copied from FreeBSD.
Thanks for reading.
Lwazi
[ 1.0000000] uboot arg = 0xbfef6fe8, 0, 0xbffa6c08, 0xbfef9908
[ 1.0000000] initarm: cbar=0x48240000
[ 1.0000000] [ Kernel symbol table missing! ]
[ 1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 200
4, 2005,
[ 1.0000000] 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2
016, 2017,
[ 1.0000000] 2018, 2019 The NetBSD Foundation, Inc. All rights reserved.
[ 1.0000000] Copyright (c) 1982, 1986, 1989, 1991, 1993
[ 1.0000000] The Regents of the University of California. All rights rese
rved.
[ 1.0000000] NetBSD 8.99.30 (PANDABOARD) #0: Thu Jan 10 23:10:23 UTC 2019
[ 1.0000000] mkrepro%mkrepro.NetBSD.org@localhost:/usr/src/sys/arch/evbarm/compile/PAND
ABOARD
[ 1.0000000] total memory = 1024 MB
[ 1.0000000] avail memory = 1006 MB
[ 1.0000000] mainbus0 (root)
[ 1.0000000] cpu0 at mainbus0 core 0: 699 MHz Cortex-A9 r2p10 (Cortex V7A core
)
[ 1.0000000] cpu0: DC enabled IC enabled WB enabled LABT branch prediction ena
bled
[ 1.0000000] cpu0: 32KB/32B 4-way L1 VIPT Instruction cache
[ 1.0000000] cpu0: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache
[ 1.0000000] cpu0: 1024KB/32B 16-way write-back-locking-D L2 PIPT Unified cach
e
[ 1.0000000] vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, den
ormals
[ 1.0000000] armperiph0 at mainbus0
[ 1.0000000] arml2cc0 at armperiph0: ARM PL310 r3p1a L2 Cache Controller (disa
bled)
[ 1.0000000] data_abort_handler: data_aborts fsr=0x808 far=0xe1242100
[ 1.0000000] Fatal kernel mode data abort: 'External Non-Linefetch Abort (S)'
[ 1.0000000] trapframe: 0x80a7fc38
[ 1.0000000] FSR=00000808, FAR=e1242100, spsr=600001d3
[ 1.0000000] r0 =00000000, r1 =e1242000, r2 =00000100, r3 =00000001
[ 1.0000000] r4 =bff9af08, r5 =bfe11988, r6 =806d1b1c, r7 =bff9af14
[ 1.0000000] r8 =8030a028, r9 =80309fec, r10=805b378c, r11=80a7fcc4
[ 1.0000000] r12=80a7fc38, ssp=80a7fc88, slr=8034a574, pc =8030a028
Stopped in pid 0.1 (system) at netbsd:generic_bs_w_4: str r3, [r1, r2]
db> bt
0x80a7fcc4: netbsd:arml2cc_attach+0x10
0x80a7fcfc: netbsd:config_attach_loc+0x1b4
0x80a7fd2c: netbsd:config_found_sm_loc+0x54
0x80a7fd44: netbsd:config_found+0x2c
0x80a7fd9c: netbsd:armperiph_attach+0x12c
0x80a7fdd4: netbsd:config_attach_loc+0x1b4
0x80a7fdec: netbsd:config_attach+0x20
0x80a7fe24: netbsd:mainbussearch+0x90
0x80a7fe44: netbsd:mapply+0x28
0x80a7fe94: netbsd:config_search_loc+0x120
0x80a7feac: netbsd:config_search_ia+0x1c
0x80a7fee4: netbsd:config_attach_loc+0x1b4
0x80a7ff0c: netbsd:config_rootfound+0x48
0x80a7ff2c: netbsd:cpu_configure+0x58
0x80a7ff9c: netbsd:main+0x258
0x80a7ffac: netbsd:kernel_text+0x50
db>
Index: files.omap2
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/files.omap2,v
retrieving revision 1.36
diff -u -p -r1.36 files.omap2
--- files.omap2 15 Oct 2016 15:11:56 -0000 1.36
+++ files.omap2 12 Jan 2019 15:41:58 -0000
@@ -31,6 +31,8 @@ defflag opt_omap.h OMAP_5430: OMAP_5X
defflag opt_omap.h TI_AM335X: OMAP3
defflag opt_omap.h TI_DM37XX: OMAP3
+file arch/arm/omap/ti_smc.S omap3
+
# OBIO just an attach point
device obio { [addr=-1], [size=0], [intr=-1], [mult=1], [intrbase=-1], [nobyteacc=0], [edmabase=-1]
} : bus_space_generic
Index: omap4_smc.h
===================================================================
RCS file: omap4_smc.h
diff -N omap4_smc.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ omap4_smc.h 12 Jan 2019 15:41:58 -0000
@@ -0,0 +1,50 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2012 Olivier Houchard. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef OMAP4_SMC_H_
+#define OMAP4_SMC_H_
+/* Define the various function IDs used by the OMAP4 */
+#define L2CACHE_WRITE_DEBUG_REG 0x100
+#define L2CACHE_CLEAN_INV_RANG 0x101
+#define L2CACHE_WRITE_CTRL_REG 0x102
+#define READ_AUX_CORE_REGS 0x103
+#define MODIFY_AUX_CORE_0 0x104
+#define WRITE_AUX_CORE_1 0x105
+#define READ_WKG_CTRL_REG 0x106
+#define CLEAR_WKG_CTRL_REG 0x107
+#define SET_POWER_STATUS_REG 0x108
+#define WRITE_AUXCTRL_REG 0x109
+#define LOCKDOWN_TLB 0x10a
+#define SELECT_TLB_ENTRY_FOR_WRITE 0x10b
+#define READ_TLB_VA_ENTRY 0x10c
+#define WRITE_TLB_VA_ENTRY 0x10d
+#define READ_TLB_PA_ENTRY 0x10e
+#define WRITE_TLB_PA_ENTRY 0x10f
+#define READ_TLB_ATTR_ENTRY 0x110
+#define WRITE_TLB_ATTR_ENTRY 0x111
+#define WRITE_LATENCY_CTRL_REG 0x112
+#define WRITE_PREFETCH_CTRL_REG 0x113
+#endif /* OMAP4_SMC_H_ */
Index: ti_smc.S
===================================================================
RCS file: ti_smc.S
diff -N ti_smc.S
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ ti_smc.S 12 Jan 2019 15:41:58 -0000
@@ -0,0 +1,41 @@
+/*-
+ * Copyright (c) 2012 Olivier Houchard. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arm/asm.h>
+#include <arm/armreg.h>
+
+ .arch armv7-a
+ .arch_extension sec
+
+/* Issue a smc #0 call */
+/* r0 and r1 contains the eventual arguments, r2 contains the function ID */
+ .global _C_LABEL(ti_smc0)
+_C_LABEL(ti_smc0):
+ stmfd sp!, {r4-r12, lr}
+ mov r12, r2 /* the rom expects the function ID in r12 */
+ dsb
+ smc #0
+ ldmfd sp!, {r4-r12, pc}
+END(_C_LABEL(ti_smc0))
+
Index: pl310.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/cortex/pl310.c,v
retrieving revision 1.18
diff -u -p -r1.18 pl310.c
--- pl310.c 20 Jun 2018 08:03:55 -0000 1.18
+++ pl310.c 12 Jan 2019 15:41:39 -0000
@@ -28,6 +28,31 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2012 Olivier Houchard. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pl310.c,v 1.18 2018/06/20 08:03:55 hkenken Exp $");
@@ -44,6 +69,10 @@ __KERNEL_RCSID(0, "$NetBSD: pl310.c,v 1.
#include <arm/cortex/pl310_reg.h>
#include <arm/cortex/pl310_var.h>
+#if defined(OMAP_4430)
+#include <arm/omap/omap4_smc.h>
+#endif
+
static int arml2cc_match(device_t, cfdata_t, void *);
static void arml2cc_attach(device_t, device_t, void *);
@@ -73,6 +102,11 @@ static inline void arml2cc_enable(struct
static void arml2cc_sdcache_wb_range(vaddr_t, paddr_t, psize_t);
static void arml2cc_sdcache_inv_range(vaddr_t, paddr_t, psize_t);
static void arml2cc_sdcache_wbinv_range(vaddr_t, paddr_t, psize_t);
+#if defined(OMAP_4430)
+uint32_t ti_smc0(uint32_t r0, uint32_t r1, uint32_t function_id);
+static void omap4_pl310_write_ctrl(uint32_t val);
+void omap4_pl310_init(struct arml2cc_softc *sc);
+#endif
static struct arml2cc_softc *arml2cc_sc;
@@ -88,6 +122,37 @@ arml2cc_write_4(struct arml2cc_softc *sc
bus_space_write_4(sc->sc_memt, sc->sc_memh, o, v);
}
+#if defined(OMAP_4430)
+void
+omap4_pl310_write_ctrl(uint32_t val)
+{
+ ti_smc0(val, 0, L2CACHE_WRITE_CTRL_REG);
+}
+
+void
+omap4_pl310_init(struct arml2cc_softc *sc)
+{
+ uint32_t aux, prefetch;
+
+ aux = arml2cc_read_4(sc, L2C_AUXCTL);
+ prefetch = arml2cc_read_4(sc, L2C_PREFETCH_CTL);
+
+ /*
+ * Disable instruction prefetch
+ */
+ prefetch &= ~PREFETCHCTL_INSTRPREF_EN;
+ aux &= ~AUXCTL_I_PREFETCH;
+
+ /*
+ * Make sure data prefetch is on
+ */
+ prefetch |= PREFETCHCTL_DATAPREF_EN;
+ aux |= AUXCTL_D_PREFETCH;
+
+ ti_smc0(aux, 0, WRITE_AUXCTRL_REG);
+ ti_smc0(prefetch, 0, WRITE_PREFETCH_CTRL_REG);
+}
+#endif
/* ARGSUSED */
static int
@@ -199,6 +264,9 @@ arml2cc_attach(device_t parent, device_t
}
} else if ((device_cfdata(self)->cf_flags & 1) == 0) {
if (!enabled_p) {
+#if defined(OMAP_4430)
+ omap4_pl310_init(sc);
+#endif
arml2cc_enable(sc);
aprint_normal_dev(self, "cache %s\n",
arml2cc_read_4(sc, L2C_CTL) ? "enabled" : "disabled");
@@ -249,7 +317,11 @@ arml2cc_disable(struct arml2cc_softc *sc
arml2cc_cache_way_op(sc, L2C_CLEAN_INV_WAY, sc->sc_waymask);
arml2cc_cache_sync(sc);
+#if defined(OMAP_4430)
+ omap4_pl310_write_ctrl(0);
+#else
arml2cc_write_4(sc, L2C_CTL, 0); // turn it off
+#endif
mutex_spin_exit(&sc->sc_lock);
}
@@ -261,7 +333,11 @@ arml2cc_enable(struct arml2cc_softc *sc)
arml2cc_cache_way_op(sc, L2C_INV_WAY, sc->sc_waymask);
arml2cc_cache_sync(sc);
+#if defined(OMAP_4430)
+ omap4_pl310_write_ctrl(1);
+#else
arml2cc_write_4(sc, L2C_CTL, 1); // turn it on
+#endif
mutex_spin_exit(&sc->sc_lock);
}
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